73S1209F Data Sheet
DS_1209F_004
MCount(2:0)
M DIVIDER
/(2*N + 4)
12.00MHz
KEYCLK
1kHz
DIVIDER
/93760
HOSCen
MCLK
96MHz
X12IN
Phase
Freq
DET
HIGH
XTAL
OSC
VCO
HCLK
12.00MHz
X12OUT
CPU CLOCK
DIVIDER
6 bits
1.5-48MHz
7.386MHz
ICLK
7.386MHz
CPUCKDiv
MPU CLOCK - CPCLK
3.6923MHz
I2CCLK
DIVIDE
by 120
400kHz
I2C_2x
800kHz
CLK1M
DIVIDE
by 96
1MHz
SMART CARD LOGIC
BLOCK CLOCK
SCCLK
SC/SCE
CLOCK
Prescaler 6bits
SEL
ETU CLOCK
ETUCLK
SCECLK
SCLK
CLOCK
Prescaler 6bits
DIVIDER
12 bits
SELSC
See SC Clock descriptions for more accurate diagram
SCCKenb
Figure 3: Clock Generation and Control Circuits
24
Rev. 1.2