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73S1121F-CGV 参数 Datasheet PDF下载

73S1121F-CGV图片预览
型号: 73S1121F-CGV
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller,]
分类和应用: 微控制器
文件页数/大小: 25 页 / 744 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
 浏览型号73S1121F-CGV的Datasheet PDF文件第17页浏览型号73S1121F-CGV的Datasheet PDF文件第18页浏览型号73S1121F-CGV的Datasheet PDF文件第19页浏览型号73S1121F-CGV的Datasheet PDF文件第20页浏览型号73S1121F-CGV的Datasheet PDF文件第22页浏览型号73S1121F-CGV的Datasheet PDF文件第23页浏览型号73S1121F-CGV的Datasheet PDF文件第24页浏览型号73S1121F-CGV的Datasheet PDF文件第25页  
73S1121F  
EMV Smart-Card Terminal Controller  
with Built-in Dual ISO-7816 Interface and USB  
DATA SHEET  
AC CHARACTERISTICS: 8052 EXTERNAL MEMORY INTERFACE TIMING  
SYMBOL  
PARAMETER  
MIN  
Typ.  
MAX  
UNIT  
MHz  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
FOSC  
TOSC  
Processor Clock Frequency  
Processor Clock Period  
ALE Pulse Width  
0
12.00  
83.33  
24  
TLHLL  
TAVLL  
TLLAX  
TLLPL  
TPLPH  
TPLIV  
TAVIV  
TPXIX  
TPXIZ  
TPLAZ  
TRLRH  
TWLWH  
TRLDV  
TRHDX  
TRHDZ  
TLLDV  
TLLWL  
TQVWX  
TWHQZ  
TRLAZ  
2TOSC - 10  
TOSC  
TOSC - 10  
TOSC - 10  
3TOSC - 20  
Address Valid to ALE Low  
Address Valid to ALE Low  
ALE Low to PSEN Low  
PSEN Pulse Width Low  
PSEN Low to Valid Inst In  
Address to Valid Inst In  
Input Instr Hold-PSEN High  
PSEN Instr Float-PSEN High  
PSEN Low to Address HighZ  
RD Pulse Width  
3TOSC - 50  
6TOSC - 50  
0
20  
10  
6TOSC - 20  
6TOSC - 20  
WR Pulse Width  
RD Low to Valid Data In  
Data Hold After RD  
5TOSC - 50  
0
Data Float After RD  
20 *  
8TOSC - 50  
3TOSC + 20  
ALE Low to Valid Data In  
ALE low to RD or WR Low  
Data Valid to WR Low  
Data Hold After WR High  
RD Low to Address Float  
3TOSC - 20  
TOSC  
TOSC - 10  
10  
Page: 21 of 25  
© 2005 TERIDIAN Semiconductor Corporation  
Rev 2.3  
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