DS_2901CE_031
73M2901CE Data Sheet
7 Reference Designs
7.1
Low Cost Design Using DSP Ring and Status Monitoring
11.0592 MHz
C3
VCC3_3D
C11
0.1uF
TXD
24
23
22
21
20
19
18
17
+
C12
3.3uF
C2
Y1
27pF
33pF
+
3.3uF
0.1uF
R17
475
HY BRID1
R15
5.1K
16
15
14
13
12
11
10
9
C7
0.1uF
C8
0.1uF
+
C9
10uF
C13
C14
VCC3_3D
U1
73M2901CE
RXD
DTRB
25
26
27
28
29
30
31
32
TXCLK
TXD
VND
N/C
VPD
OSCIN
OSCOUT
VND
C4
56nF
R2
2.7K
VND
VPD
DCD
DSR
CTS
RTS
USR11
USR10
RIB
VPD
RXD
RXCLK
DTR
USR20
RING
RELAY
RI
VNA
RXA
VBG
VREF
TXAP
TXAN
VPA
RESET
R13
21K
HY BRID2
VCC3_3A
C10
0.1uF
VCC3_3D
R20
27K
DCDB
DSRB
CTSB
RTSB
1
2
3
4
5
6
7
8
R18 100
R16 100
VCC3_3D
C1 10uF
+
R1
10K
DETECT
LIUCHK
HOOKB
C5
3.3uF
+
C6
0.1uF
HY BRID1
T1
Sumida
MIT4115
2
3
L1
NLC322522T-4R7M
HY BRID2
4
1
4
VCC3_3D
1
+
-
E1
TISP4350T3BJR
Bourns
Thy ristor
2
1
2
F1
MF-R015/600
Bourns
PTC f use
J2
4
3
2
1
RJ-11
1
4
BR1
CBRHD-04
3
U2
TLP627
R9
C19
0.22uF
250V
L2
NLC322522T-4R7M
63K
2
3
HOOKB
ISOLATION BARRIER
Figure 3: Low Cost Design Using DSP Ring and Status Monitoring
Rev. 3.3
15
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
