73M1903 Data Sheet
DS_1903_032
8.3.2 AC Timing
Table 14: Serial I/F Timing
Min
Parameter
Nom
Max
Unit
–
–
–
–
SCLK Period (Tsclk) (Fs=8 kHz)
SCLK to FS Delay (td1) – mode1
SCLK to FS Delay (td2) – mode1
SCLK to SDOUT Delay (td3) (With 10pf load)
Setup Time SDIN to SCLK (tsu)
Hold Time SDIN to SCLK (th)
SCLK to FS Delay (td4) – mode0
SCLK to FS Delay (td5) – mode0
1/2.048 MHz
–
–
ns
ns
20
20
–
–
–
–
–
–
ns
ns
ns
ns
ns
ns
20
–
15
–
10
–
20
20
–
td1
td2
Tsclk
SCLK
FS
(mode1)
RX15
RX14
RX1
TX1
RX0
TX0
SDOut
SDIN
td3
tsu
TX15
th
TX14
FS
(mode0)
td5
td4
Figure 11: Serial Port Data Timing
28
Rev. 2.0
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
