73M1866B/73M1966B Data Sheet
DS_1x66B_001
2.4 73M1916 32-Pin QFN Pinout
Figure 5 shows the 73M1916 32-pin QFN pinout.
CKO
OFH
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
DCD
RST
TST
TXM
CKI
VNX
73M1916
SCP
MID
SACIN
RXM
RXP
SCM
VPX
VPS
Figure 5: 73M1916 32-Pin QFN Pinout
Table 4 describes the pin functions for the device. Decoupling capacitors on the power supplies should
be included for each pair of supply pins.
Table 4: 73M1916 32-Pin QFN Pin Definitions
Pin
Pin
Type
Description
Test point for recovered clock
Number Name
1
2
3
4
5
6
7
8
9
CKO
OFH
CKI
O
O
Off-hook control
I
Test input for clock
VNX
SCP
MID
GND
I/O
I/O
I/O
PWR
I
Negative supply voltage
Positive side of the secondary pulse transformer winding
Charge pump midpoint
SCM
VPX
RCT
Negative side of the secondary pulse transformer winding
Supply from the barrier
External rectification – disables internal rectifier when low,
leave open
10
11
12
13
14
15
BYP
SRE
SRB
VNS
VBG
ACS
I
Test pin, leave open
I
O
Voltage regulator sense
Voltage regulator drive
GND
O
Digital negative supply voltage
VBG bypass, connect to 0.1μF capacitor to VNS
AC current sense
I
12
Rev. 1.6
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
