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73K324L-28IH/F 参数 Datasheet PDF下载

73K324L-28IH/F图片预览
型号: 73K324L-28IH/F
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片调制解调器 [Single-Chip Modem]
分类和应用: 调制解调器电信电路
文件页数/大小: 30 页 / 239 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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73K324L
CCITT V.22bis,V.23,V.22,V.21, Bell 212A
Single-Chip Modem
DATA SHEET
REGISTER ADDRESS TABLE
ADDRESS
REGISTER
AD2 - AD0
D7
D6
D5
DATA BIT NUMBER
D4
D3
D2
D1
D0
CONTROL
REGISTER
0
CR0
000
MODULATION
OPTION
MODULATION
TYPE
1
MODULATION
TYPE
0
TRANSMIT
MODE
2
TRANSMIT
MODE
1
TRANSMIT
MODE
0
TRANSMIT
ENABLE
ANSWER/
ORIGINATE
QAM: 0=2400 BIT/S
DPSK: 0=1200 BIT/S
1=600 BIT/S
FSK: 0=V.23
1=V.21
10=QAM
00=DPSK
01=FSK
0000=PWR DOWN
0001=INT SYNCH
0010=EXT SYNCH
0011=SLAVE SYNCH
0100=ASYCH 8 BITS/CHAR
0101=ASYCH 9 BITS/CHAR
0110=ASYCH 10 BITS/CHAR
0111=ASYCH 11 BITS/CHAR
1X00=FSK
ENABLE
DETECT
INTERRUPT
BYPASS
SCRAMBLER/
ADD PH. EQ.
(V.23)
CLK
CONTROL
0=DISABLE
TXA OUTPUT
1=ENABLE
TXA OUTPUT
0=ANSWER
1=ORIGINATE
in V.23
0=BC xmit
1=MC xmit
CONTROL
REGISTER
1
CR1
001
TRANSMIT
PATTERN
1
TRANSMIT
PATTERN
0
RESET
TEST
MODE
1
TEST
MODE
0
00=TX DATA
01=TX ALTERNATE
10=TX MARK
11=TX SPACE
0=OFF
1=ON
0=XTAL
0=NORMAL
1=16 X DATA
1=BYPASS
SCRAMBLER RATE OUTPUT
AT CLK PIN IN
QAM/DPSK
MODE ONLY
UNSCR.
MARKS
DETECT
CARRIER
DETECT
0=NORMAL
1=RESET
00=NORMAL
01=ANALOG LOOPBACK
10=REMOTE DIGITAL
LOOPBACK
11=LOCAL DIGITAL
LOOPBACK
CP
TONE
DETECT
SIGNAL
QUALITY
INDICATOR
0=GOOD
1=BAD
DETECT
REGISTER
DR
010
RECEIVE
LEVEL
INDICATOR
S1 PATTERN
DETECT
RECEIVE
DATA
SPECIAL
TONE
DETECT
0=SIGNAL
0=NOT PRESENT OUTPUTS
BELOW
1=PATTERN
RECEIVED
THRESHOLD
FOUND
DATA STREAM
1=ABOVE
THRESHOLD
TONE
CONTROL
REGISTER
RXD
OUTPUT
CONTROL
RXD PIN
0=NORMAL
1=TRI-STATE
TRANSMIT
GUARD/
CALLING/
SCT TONE
0=OFF
1=ON
TRANSMIT
ANSWER
TONE
0=OFF
1=ON
TRANSMIT
DTMF
0=CONDITION NOT DETECTED
1=CONDITION DETECTED
TR
011
DTMF3
DTMF2/
4 WIRE
FDX
DTMF1/
OVERSPEED
DTMF0/
GUARD/
ANSWER/
CALLING/SCT
1=TX DTMF
4 BIT CODE FOR 1 OF 16
DUAL TONE COMBINATIONS
0=NORMAL OPERATION
1=ALLOWS V.23 FULL
DUPLEX OPERATION
0 - 1800 HZ
1 - 550 HZ
ANSWER: 0 - 2225 HZ
1 - 2100 HZ
CALLING: 0 - 1300 HZ
1 - 900 HZ
SCT:
GUARD:
CONTROL
REGISTER
2
CR2
100
MUST BE 0
SPECIAL
REGISTER
ACCESS
0=ACCESS CR3
1=ACCESS
SPECIAL
REGISTER
CALL
INITIALIZE
TRANSMIT
S1
16 WAY
RESET
DSP
TRAIN
INHIBIT
EQUALIZER
ENABLE
0=NORMAL
0=DSP IN
DOTTING
DEMOD MODE
1=S1
1=DSP IN CALL
PROGRESS
MODE
0=RX=TX
1=RX=16 WAY
0=DSP
INACTIVE
1=DSP
ACTIVE
0=ADAPT EQ
ACTIVE
1=ADAPT EQ
FROZEN
0=ADAPT EQ
IN INIT
1=ADAPT EQ
OK TO ADAPT
CONTROL
REGISTER
3
CR3
101
TXDALT
TRISTATE
TX/RXCLK
0=CLOCK
DRIVEN
1=CLOCK
TRISTATE
0
RECEIVE
GAIN
BOOST
0=NO BOOST
1=18 dB BOOST
TRANSMIT
ATTEN.
3
TRANSMIT
ATTEN.
2
TRANSMIT
ATTEN.
1
TRANSMIT
ATTEN.
0
ALTERNATE
TRANSMIT
DATA
SOURCE
SPECIAL
REGISTER
0000-1111, SETS
TRANSMIT ATTENUATOR
16 dB RANGE
DEFAULT=0100 ³ -10 dbM0
TXD
SOURCE
SQ
SELECT1
SQ
SELECT0
SR
101
0
TX BAUD
CLOCK
RX UNSCR.
DATA
0
0
OUTPUTS
TXBAUD
CLOCK
OUTPUTS
UNSCR.
DATA
0=TXD PIN
1=TX DATA
CR3-D7
00³10
01³10
10³10
11³10
-5 BER
-6 BER
-4
BER
-3
BER
ID
REGISTER
10
110
1
1
1
0
X
X
X
X
00XX=73K212AL, 322L, 321L
01XX=73K221AL, 302L
10XX=73K222AL, 222BL
1100=73K224L
1110=73K324L
1100=73K224BL
1110=73K324BL
Page: 7 of 30
©
2005, 2008 TERIDIAN Semiconductor Corporation
Rev 7.1