73K324L
CCITT V.22bis,V.23,V.22,V.21, Bell 212A
Single-Chip Modem
DATA SHEET
CONTROL REGISTER 1 (continued)
D7
D6
D5
D4
D3
D2
D1
D0
TRANSMIT
PATTERN
1
TRANSMIT
PATTERN
0
ENABLE
DETECT
INT.
BYPASS
SCRAMB/
ADD
CLK
CONTROL
RESET
TEST
MODE
1
TEST
MODE
0
CR1
001
PH.EQ.
BIT NO.
NAME
CONDITION
DESCRIPTION
D4
Bypass
Scrambler/
Add Ph. Eq.
0
Selects normal operation. DPSK and QAM data is
passed through scrambler.
1
Selects Scrambler Bypass. DPSK and QAM data is
routed around scrambler in the transmit path. In the V.23
mode, additional phase equalization is added to the main
channel filters when D4 is set to 1.
D5
Enable
Detect
Interrupt
0
1
Disables interrupt at INT pin. All interrupts are normally
disabled in Power Down mode.
Enables INT output. An interrupt will be generated with a
change in status of DR bits D1-D4 and D6. The answer
tone and call progress detect interrupts are masked when
the TX enable bit is set. Carrier detect is masked when
TX DTMF is activated. All interrupts will be disabled if the
device is in Power Down mode.
D7
0
D6
0
D7, D6
Transmit
Pattern
Selects normal data transmission as controlled by the
state of the TXD pin.
0
1
Selects an alternating mark/space transmit pattern for
modem testing and handshaking. Also used for S1
pattern generation. See CR2 bit D4.
1
1
0
1
Selects a constant mark transmit pattern.
Selects a constant space transmit pattern.
Page: 10 of 30
© 2005, 2008 TERIDIAN Semiconductor Corporation
Rev 7.1
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
