73K224BL
V.22bis, V.22, V.21, Bell 212A, 103
Single-Chip Modem w/ Integrated Hybrid
DATA SHEET
CONTROL REGISTER 1 (continued)
CR1 D7 D6
ADDR TRANSMIT TRANSMIT
D5
D4
D3
D2
D1
D0
ENABLE
DETECT
INTERRUPT
BYPASS
SCRAMBLER
CLOCK
CONTROL
RESET
TEST
MODE 1
TEST
MODE 0
001
PATTERN
1
PATTERN
0
BIT
NAME
CONDITION
DESCRIPTION
D4
Bypass
Scrambler
0
Selects normal operation. DPSK and QAM data is passed
through scrambler.
1
0
1
Selects Scrambler bypass. Bypass DPSK and QAM data
is route around scrambler in the transmit path.
D5
Enable Detect
Interrupt
Disables interrupt at INT pin. All interrupts are normally
disabled in power-down mode.
Enables INT output. An interrupt will be generated with a
change in status of DR bits D1- D4 and D6. The answer
tone and call progress detect interrupts are masked when
the TX enable bit is set. Carrier detect is masked when
TXDTMF is activated. All interrupts will be disabled if the
device is in power-down mode.
D7 D6
D6, D7
Transmit
Pattern
0
0
Selects normal data transmission as controlled by the state
of the TXD pin.
0
1
Selects an alternating mar/space transmit pattern for
modem testing and handshaking. Also used for S1 pattern
generation (see CR2 bit D4).
1
1
0
1
Selects a constant mark transmit pattern.
Selects a constant space transmit pattern.
DETECT REGISTER
DR
D7
D6
D5
D4
D3
D2
D1
D0
ADDR
010
RECEIVE
LEVEL
INDICATOR
S1
PATTERN
DETECT
RECEIVE
DATA
UNSCR.
MARK
DETECT
CARR.
DETECT
ANSWER
TONES
DETECT
CALL
PROG.
DETECT
SIGNAL
QUALITY
INDICATOR
BIT
NAME
CONDITION
DESCRIPTION
Indicates normal received signal.
D0
Signal Quality
Indicator
0
1
Indicates low received signal quality (above average error
rate). Interacts with Special Register bits D2, D1.
D1
Call Progress
Detect
0
1
No call progress tone detected.
Indicates presence of call progress tones. The call progress
detection circuitry is activated by energy in the normal 350
to 620 Hz call progress bandwidth.
Page: 12 of 33
© 2005, 2008 TERIDIAN Semiconductor Corporation
Rev 7.1
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
