欢迎访问ic37.com |
会员登录 免费注册
发布采购

71M6533H-IGTR/F 参数 Datasheet PDF下载

71M6533H-IGTR/F图片预览
型号: 71M6533H-IGTR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 电能计量IC [Energy Meter IC]
分类和应用:
文件页数/大小: 124 页 / 1997 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
 浏览型号71M6533H-IGTR/F的Datasheet PDF文件第38页浏览型号71M6533H-IGTR/F的Datasheet PDF文件第39页浏览型号71M6533H-IGTR/F的Datasheet PDF文件第40页浏览型号71M6533H-IGTR/F的Datasheet PDF文件第41页浏览型号71M6533H-IGTR/F的Datasheet PDF文件第43页浏览型号71M6533H-IGTR/F的Datasheet PDF文件第44页浏览型号71M6533H-IGTR/F的Datasheet PDF文件第45页浏览型号71M6533H-IGTR/F的Datasheet PDF文件第46页  
71M6533/71M6534 Data Sheet  
FDS_6533_6534_004  
When not needed for the optical UART, the OPT_TX pin can alternatively be configured as DIO2,  
WPULSE, or VARPULSE. The configuration bits are OPT_TXE[1:0]. Likewise, OPT_RX can alternately  
be configured as DIO_1. Its control is OPT_RXDIS.  
V3P3  
VARPULSE  
WPULSE  
DIO2  
Internal  
3
2
1
OPT_TX  
from  
OPT_TX UART  
A
MOD  
B
0
OPT_TXINV  
EN DUTY  
2
OPT_TXE[1:0]  
OPT_TXMOD  
OPT_FDC  
OPT_TXMOD = 1,  
OPT_FDC = 2 (25%)  
OPT_TXMOD = 0  
A
B
A
B
1/38kHz  
Figure 8: Optical Interface  
In the 71M6534, a multiplexer allows the selection of alternate pins DIO18/MTX and DIO22/RTX for  
UART1. This function is controlled with the I/O RAM registers UMUX_E and UMUX_SEL.  
1.4.7 Digital I/O  
The device includes up to 40 pins (71M6533) or 53 pins (71M6534) of general purpose digital I/O. These  
pins are compatible with 5 V inputs (no current limiting resistors are needed). The Digital I/O pins can be  
categorized as follows:  
Dedicated DIO pins (5 pins): DIO3, DIO56, DIO57, DIO58, PB  
DIO/LCD segment pins  
o
A total of 33 pins for the 71M6533:  
DIO4/SEG24 - DIO11/SEG31 (8 pins)  
DIO13/SEG33 - DIO21/SEG41 (9 pins)  
DIO23/SEG43 – DIO27/SEG47 (5 pins)  
DIO29/SEG49 - DIO30/SEG50 (2 pins)  
DIO41/SEG61 (1 pin)  
DIO43/SEG63 - DIO45/SEG65 (3 pins)  
DIO47/SEG67 – DIO51/SEG71 (5 pins)  
A total of 46 pins for the 71M6534:  
DIO4/SEG24 – DIO30/SEG50 (27 pins)  
DIO36/SEG56 – DIO39/SEG59 (4 pins)  
DIO41/SEG61 – DIO55/SEG75 (15 pins)  
o
DIO pins combined with other functions (2 pins): DIO2/OPT_TX, DIO1/OPT_RX  
On reset or power-up, all DIO pins are inputs until they are configured for the desired direction under  
MPU control. The pin function can be configured by the I/O RAM registers LCD_BITMAPn. Setting  
LCD_BITMAPn = 1 configures the pin for LCD, setting LCD_BITMAPn = 0 configures it for DIO.  
Once a pin is configured as DIO, it can be configured independently as an input or output with the  
DIO_DIR bits or the LCD_SEGn registers. Input and output data are written to or read from the pins using  
SFR registers P0, P1, and P2.  
Table 39 shows all the DIO pins with their configuration, direction control and data registers. Table en-  
tries marked with an asterisk and grayed are applicable to the 71M6534 only.  
42  
© 2007-2009 TERIDIAN Semiconductor Corporation  
v1.1