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71M6533H-IGT/F 参数 Datasheet PDF下载

71M6533H-IGT/F图片预览
型号: 71M6533H-IGT/F
PDF下载: 下载PDF文件 查看货源
内容描述: 电能计量IC [Energy Meter IC]
分类和应用: 模拟IC信号电路
文件页数/大小: 124 页 / 1997 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6533/71M6534 Data Sheet  
FDS_6533_6534_004  
Table 3: ADC RAM Locations  
Signal Number  
Address (HEX)  
0x00  
Name  
IA  
0
1
0x01  
VA  
2
3
0x02  
IB  
0x03  
VB  
4
0x04  
IC  
5
0x05  
VC  
6
0x06  
ID  
0x0A  
0x0B  
0x0A  
TEMP  
VBAT  
0x0B  
1.2.5 Voltage References  
The device includes an on-chip precision bandgap voltage reference that incorporates auto-zero tech-  
niques. The reference of the 71M6533H/71M6534H is trimmed in production to minimize errors caused  
by component mismatch and drift. The result is a voltage output with a predictable temperature coeffi-  
cient.  
The amplifier within the reference is chopper stabilized, i.e. the polarity can be switched by the MPU us-  
ing the I/O RAM register CHOP_E (0x2002[5:4]). The two bits in the CHOP_E register enable the MPU to  
operate the chopper circuit in regular or inverted operation, or in toggling mode. When the chopper circuit  
is toggled in between multiplexer cycles, DC offsets on the measured signals will automatically be aver-  
aged out.  
The general topology of a chopped amplifier is shown in Figure 2.  
A
B
A
B
A
Voutp  
Vinp  
Vinn  
+
-
B
A
G
Voutn  
B
CROSS  
Figure 2: General Topology of a Chopped Amplifier  
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as con-  
trolled by CROSS, in the A position, the output voltage is:  
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff  
With all switches set to the B position by applying the inverted CROSS signal, the output voltage is:  
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or  
Voutp – Voutn = G (Vinp – Vinn) - G Voff  
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the  
output as positive and negative, which results in the offset effectively being eliminated, regardless of its  
polarity or magnitude.  
When CROSS is high, the connection of the amplifier input devices is reversed. This preserves the over-  
all polarity of that amplifier gain; it inverts its input offset. By alternately reversing the connection, the am-  
plifier’s offset is averaged to zero. This removes the most significant long-term drift mechanism in the  
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© 2007-2009 TERIDIAN Semiconductor Corporation  
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