Data Sheet 71M6531D/F-71M6532D/F
FDS 6531/6532 005
In the absence of system power, if the voltage margin for the LDO regulator providing 2.5 V to the internal
circuitry becomes too low to be safe, the part automatically enters sleep mode (BAT_OK false). The bat-
tery voltage must stay above 3 V to ensure that BAT_OK remains true. Under this condition, the
71M6531 stays in SLEEP mode, even if the voltage margin for the LDO improves (BAT_OK true). Table
47 shows the circuit functions available in each operating mode.
Table 47: Available Circuit Functions
System Power
MISSION
Yes
Battery Power (Nonvolatile Supply)
Circuit Function
BROWNOUT
LCD
SLEEP
–
–
–
CE
–
–
–
–
–
–
CE Data RAM
FIR
Yes
Yes
Yes
–
–
Analog circuits
MPU clock rate
Yes
From PLL, as
defined by
MPU_DIV
28.672 kHz
(7/8 of 32768 Hz)
–
–
–
–
–
–
–
–
–
–
–
MPU_DIV
ICE
Yes
Yes
Yes
Yes
Yes
Yes
Yes
DIO Pins
Watchdog Timer
LCD
Yes
Yes
Yes
Yes
–
–
–
EEPROM Interface (2-wire)
Yes (8 kb/s)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
EEPROM Interface (3-wire)
UART
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes (16 kb/s)
300 bd
–
Optical TX modulation
Flash Read
Yes
Yes
–
Flash Page Erase
Flash Write
RAM Read and Write
Yes
Wakeup Timer
Yes
Yes
Yes
Yes
Yes
Yes
Yes
–
Yes
Yes
–
OSC and RTC
XRAM data preservation
Yes
–
–
V3P3D voltage output pin
GPO – GP7 registers
Yes
Yes
Yes
Yes
Yes
Yes
-- indicates not active
2.3.1 BROWNOUT Mode
In BROWNOUT mode, most non-metering digital functions are active (as shown in Table 47), including
ICE, UART, EEPROM, LCD and RTC. In BROWNOUT mode, a low bias current regulator will provide
2.5 Volts to V2P5 and V2P5NV. The regulator has an output called BAT_OK to indicate that it has suffi-
cient overhead. When BAT_OK = 0, the part will enter SLEEP mode. From BROWNOUT mode, the pro-
cessor can voluntarily enter LCD or SLEEP modes. When system power is restored, the part will auto-
matically transition from any of the battery modes to MISSION mode, once the PLL has settled.
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