71M6513/71M6513H
3-Phase Energy Meter IC
A Maxim Integrated Products Brand
DATA SHEET
SEPTEMBER 2011
With all switches set to the “B” position by applying the inverted CROSS signal, the output voltage is:
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or
Voutp – Voutn = G (Vinp – Vinn) - G Voff
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the output as positive and
negative, which results in the offset effectively being eliminated, regardless of its polarity or magnitude.
The Functional Description Section contains a chapter with a detailed description on controlling the CHOP_EN register.
Temperature Sensor
The 71M6513/6513H includes an on-chip temperature sensor implemented as a bandgap reference. It is used to determine
the die temperature The MPU may request an alternate multiplexer cycle containing the temperature sensor output by
asserting MUX_ALT.
The primary use of the temperature data is to determine the magnitude of compensation required to offset the thermal drift in
the system (see section titled “Temperature Compensation”).
The zero reference for the temperature sensor is VBIAS.
V3
V3 is an additional analog monitor input that can be used for analog measurements, such as neutral current. It is sampled
when the multiplexer performs an alternate multiplexer cycle. The zero reference for the V3 input is VBIAS.
V3 is also routed into the comparator block where it is compared to VBIAS. Comparator interrupts should be disabled when
the V3 input is used for analog measurements.
Functional Description
The AFE functions as a data acquisition system, controlled by the MPU. The main signals (IA, VA, IB, VB, IC, VC) are
sampled and the ADC counts obtained are stored in CE RAM where they can be accessed by the CE and, if necessary, by the
MPU. Alternate multiplexer cycles are initiated less frequently by the MPU to gather access to the slow signals, temperature
and V3.
VREF VBIAS
IA
VA
IB
VB
∆Σ ADC
CONVERTER
VBIAS
(1.5V)
MUX
V3P3A
-
IC
FIR
FILTER
VC
+
VREF
V3
TEMP
FIR_LEN
VREF
CHOP_EN
VREF_DIS
MUX
MUX
CTRL
EQU
MUX_ALT
CK32
MUX_DIV
Figure 3: AFE Block Diagram
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