71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
AUGUST 2007
VREF
VBIAS
V3P3A
GNDA
GNDA
IA
VA
IB
VBIAS
MUX
V3P3A
-
+
VREF
TEMP
MUX
MUX
CTRL
EQU
MUX_ALT
MUX_DIV
CHOP_EN
VREF_DIS
CK32
∆Σ
ADC
CONVERTER
VOLTAGE
BOOST
VDRV
FIR
FILTER
FIR_LEN
LCD_IBST
LCD_BSTEN
VREF
GNDD
VOLT
REG
V3P3D
VBAT
XIN
XOUT
CKTEST
CKOUT_EN
OSC
(32KHz)
OSC_DIS
RTCLK (32KHz)
MCK
PLL
0.1V
GNDD
V2P5
V2P5
VLCD
CK_EN
4.9MHz
CK_GEN
ECK_DIS
MPU_DIV
CK_2X
CKMPU_2X
MUX_SYNC
CKCE
<4.9MHz
WPULSE
VARPULSE
CE
32-bit Compute
Engine
RTM
DATA
00-FF
CKFIR
4.9MHz
CE RAM
(1KB)
SSI
2.5V to logic
STRT
MUX
LCD DISPLAY
DRIVER
MEMORY SHARE
TEST
CE
CONTROL
COM0..3
SEG0..SEG2
PROG
000-7FF
1000-13FF
EQU
PRE_SAMPS
SUM_CYCLES
RTM_EN
CE_EN
XFER BUSY
CE_BUSY
CE_RUN
CE PROG
RAM
(4KB)
CE_LOAD
WPULSE
VARPULSE
3000-3FFF
I/O RAM
LCD_NUM
LCD_MODE
LCD_CLK
LCD_EN
DIGITAL I/O
DIO_EEX
PULSEV/W
DIO_IN
DIO_OUT
LCD_NUM
DIO_GP
RTC
RTC_HOLD
RTC_SET
CONFIGURATION
PARAMETERS
RTCLK
SEG8..SEG19
SEG24/DIO4 ...
SEG31/DIO11
SEG34/DIO14 ...
SEG37/DIO17
SEG3/SCLK
SEG4/SSDATA
SEG5/SFR
SEG6/SRDY
SEG7/
MUX_SYNC
CKMPU
<4.9MHz
SCL
SDA
EEPROM
INTERFACE
2000-20FF
DATA
0000-FFFF
0000-07FF
CONFIG
RAM
XFER_BUSY
MPU XRAM
(2KB)
CE_BUSY
RTCLK
reserved
CK_MPU
CK_10M
MUX_SYNC
OPTRX
reserved
reserved
WDTR_EN
RTM
VBIAS
PLL_2.5V
IBIAS
DGND
TX
RX
UART
DMUX
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
ANALOG
DIGITAL
MPU
(8051)
OPT_TX
OPTICAL
PROG
0000-FFFF
VBIAS
0000-FFFF
FLASH
(64KB)
EERDSLOW
EEWRSLOW
OPT_RX
OPT_TXDIS
V1
POWER FAULT
WAKE
FAULTZ
V3P3
EMULATOR
PORT
COMP_STAT
COMP_INT
TMUXOUT
0
TMUX
October 5, 2005
RESETZ
Figure 1: IC Functional Block Diagram
Page: 7 of 95
© 2005-2007 TERIDIAN Semiconductor Corporation
V2.6
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
