71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
AUGUST 2007
XFER_BUSY and RTC_1SEC, which are OR-ed together, have their own enable and flag bits in addition to the interrupt 6
enable and flag bits (see Table 45), and these interrupts must be cleared by the MPU software.
External
Connection
Polarity
Flag Reset
Interrupt
0
1
2
3
4
5
6
Digital I/O High Priority
Digital I/O Low Priority
Comparator 2 or 3
CE_BUSY
Comparator 2 or 3
EEPROM busy
see DIO_Rx
see DIO_Rx
falling
automatic
automatic
automatic
automatic
automatic
automatic
manual
falling
rising
falling
falling
XFER_BUSY OR RTC_1SEC
Table 44: External MPU Interrupts
Interrupt 6 is edge-sensitive. The RTC_1SEC interrupt from the RTC and the XFER_BUSY interrupt from the CE are combined
using a logic OR function and the result is routed into interrupt 6. Therefore, both flags must be cleared at least once during
initialization, and both flags must always be cleared before exiting the interrupt service routine (ISR) for interrupt 6.
Note 1: If clearing of both flags is not performed, then no edge can occur to trigger interrupt 6 later resulting in the ISR for the
XFER_BUSY ceasing to run.
Note 2: Clearing both flags reliably requires some care. Either flag can be set by hardware while interrupt 6 code is running on
behalf of the other interrupt. In this situation, the unprocessed interrupt can create a lockout condition similar to the one in note
1. To prevent this lockout one must always process both interrupt flags in the same service routine.
Note 3: After a reset from an in-circuit emulator, the IE_XFER flag may not be cleared because the CE may continue to run.
The flags for the RTC_1SEC and the XFER_BUSY interrupts are located in the WDI SFR (address 0xE8).
Enable Bit
EX0
Description
Flag Bit
IE0
IE1
IEX2
IEX3
IEX4
IEX5
IEX6
IE_XFER
IE_RTC
Description
Enable external interrupt 0
Enable external interrupt 1
Enable external interrupt 2
Enable external interrupt 3
Enable external interrupt 4
Enable external interrupt 5
Enable external interrupt 6
Enable XFER_BUSY interrupt
Enable RTC_1SEC interrupt
External interrupt 0 flag
External interrupt 1 flag
External interrupt 2 flag
External interrupt 3 flag
External interrupt 4 flag
External interrupt 5 flag
External interrupt 6 flag
XFER_BUSY interrupt flag
RTC_1SEC interrupt flag
EX1
EX2
EX3
EX4
EX5
EX6
EX_XFER
EX_RTC
Table 45: Control Bits for External Interrupts
Page: 32 of 95
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