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71M6511H-IGTR 参数 Datasheet PDF下载

71M6511H-IGTR图片预览
型号: 71M6511H-IGTR
PDF下载: 下载PDF文件 查看货源
内容描述: 单相电能计量芯片 [Single-Phase Energy Meter IC]
分类和应用:
文件页数/大小: 95 页 / 860 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6511/71M6511H  
Single-Phase Energy Meter IC  
DATA SHEET  
AUGUST 2007  
Internal Data Memory: The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data  
memory address is always 1 byte wide and can be accessed by either direct or indirect addressing. The Special Function  
Registers occupy the upper 128 bytes. This SFR area is available only by direct addressing. Indirect addressing  
accesses the upper 128 bytes of Internal RAM.  
The lower 128 bytes contain working registers and bit-addressable memory. The lower 32 bytes form four banks of eight  
registers (R0-R7). Two bits on the program memory status word (PSW) select which bank is in use. The next 16 bytes form a  
block of bit-addressable memory space at bit addressees 0x00-0x7F. All of the bytes in the lower 128 bytes are accessible  
through direct or indirect addressing. Table 6 shows the internal data memory map.  
Address  
Direct addressing  
Indirect addressing  
0xFF  
0x80  
0x7F  
0x30  
0x2F  
0x20  
0x1F  
0x00  
Special Function Registers  
(SFRs)  
RAM  
Byte-addressable area  
Bit-addressable area  
Register banks R0…R7  
Table 6: Internal Data Memory Map  
Special Function Registers (SFRs)  
A map of the Special Function Registers is shown in Table 7.  
Bit-address-  
Byte-addressable  
able  
Hex\Bin  
Bin/Hex  
X000  
X001  
X010  
X011  
X100  
X101  
X110  
X111  
F8  
F0  
E8  
E0  
D8  
D0  
C8  
C0  
B8  
B0  
A8  
A0  
98  
90  
88  
80  
INTBITS  
FF  
F7  
EF  
E7  
DF  
D7  
CF  
C7  
BF  
B7  
AF  
A7  
9F  
97  
B
WDI  
A
WDCON  
PSW  
IRCON  
IEN1  
IP1  
S0RELH  
FLSHCTL  
S0RELL  
DIR0  
S1RELH  
S1CON  
USR2  
PGADR  
IEN0  
P2  
IP0  
DIR2  
S0BUF  
DIR1  
TMOD  
SP  
S0CON  
P1  
IEN2  
S1BUF S1RELL EEDATA EECTRL  
DPS  
ERASE  
TCON  
P0  
TL0  
TL1  
DPH  
TH0  
TH1  
DPH1  
CKCON  
WDTREL  
8F  
87  
DPL  
DPL1  
PCON  
Table 7: Special Function Registers Locations  
Only a few addresses are occupied, the others are not implemented. SFRs specific to the 651X are shown in bold print. Any  
read access to unimplemented addresses will return undefined data, while any write access will have no effect. The registers at  
0x80, 0x88, 0x90, etc., are bit-addressable, all others are byte-addressable.  
Page: 17 of 95  
© 2005-2007 TERIDIAN Semiconductor Corporation  
V2.6