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71M6403 参数 Datasheet PDF下载

71M6403图片预览
型号: 71M6403
PDF下载: 下载PDF文件 查看货源
内容描述: 电子脱扣器 [Electronic Trip Unit]
分类和应用: 电子
文件页数/大小: 75 页 / 588 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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71M6403  
Electronic Trip Unit  
SEPTEMBER 2006  
Digital Pins:  
NAME  
PIN #  
21  
TYPE  
DESCRIPTION  
DIO_3,  
DIO_2,  
20  
I/O  
Digital input/output pins 0 through 3  
DIO_1,  
19  
DIO_0  
18  
COM3,  
25  
COM2,  
24  
O
LCD Common Outputs: These 4 pins provide the select signals for the LCD display.  
Dedicated LCD segment outputs  
COM1,  
23  
COM0  
22  
SEG0…SEG2,  
SEG8…SEG23  
SEG24/DIO4…  
…….  
See  
pinout  
O
I/O  
O
Multi-use pins, configurable as either LCD SEG driver or DIO. (DIO4 = SCK, DIO5 =  
SDA when configured as EEPROM interface, STROBE = DIO6, FAULT_PULSE =  
DIO7 when configured as pulse outputs)  
Multi-use-pin LCD Segment Output/ MUX_SYNC is output for Synchronous serial  
interface  
See  
pinout  
SEG41/DIO21  
SEG7/MUX_SYNC  
37  
SEG6/SRDY  
SEG5/SFR  
SEG4/SDATA  
SEG3/SCLK  
35  
11  
10  
6
I/O  
O
O
O
Multi-use-pin, LCD Segment Outputs/ SRDY input for Synchronous serial interface.  
Multi-use-pin, LCD Segment Output/ SFR output for SSI.  
Multi-use-pin, LCD Segment Output/ SDATA output for SSI.  
Multi-use-pin, LCD Segment Output/ SCLK output for SSI.  
Chip reset: This pin is used to reset the chip into a known state. For normal  
operation, this pin is set to 1. To reset the chip, this pin is driven to 0. This pin has  
an internal 30µA (nominal) current source pull-up but no Schmitt-trigger input  
circuitry. The minimum width of the pulse is 5µs. A 0.1µF capacitor to GNDA should  
be connected to this pin.  
RESETZ  
74  
I
RX  
TX  
71  
5
I
O
UART input. The voltage applied at this input must be below 3.6V.  
UART output.  
Optical Receive Input: This pin receives a signal from an external photo-detector  
used in an IR serial interface.  
OPT_RX  
89  
I
Optical LED Transmit Output: This pin is designed to directly drive an LED for  
transmitting data in an IR serial interface. Can be tristated with OPT_TXDIS to be  
multiplexed with other DIO pins.  
OPT_TX  
3
O
CK  
TMUXOUT  
8
4
O
O
Clock input (19.6608 MHz)  
Digital output test multiplexer. Controlled by DMUX[3:0].  
E_RXTX  
2
12  
13  
14  
15  
29  
100  
97  
I/O  
Emulator serial data.  
E_TBUS[3]  
E_TBUS[2]  
E_TBUS[1]  
E_TBUS[0]  
E_ISYNC/BRKRQ  
E_TCLK  
O
Emulator trace bus. These pins have internal pull-up resistors.  
I/O  
O
I
Emulator handshake. This pin has an internal pull-up resistor.  
Emulator clock. This pin has an internal pull-up resistor.  
Emulator reset. This pin has an internal pull-up resistor.  
E_RST  
For TERIDIAN internal use. This pin must be connected to GNDD via a 1kΩ  
TEST3  
93  
I
resistor.  
Page: 74 of 75  
© 2006 TERIDIAN Semiconductor Corporation  
REV 1.0  
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