71M6403
Electronic Trip Unit
SEPTEMBER 2006
Serial Interface 0 Control Register (S0CON).
The function of the UART0 depends on the setting of the Serial Port Control Register S0CON.
MSB
LSB
RI0
SM0
SM1
SM20
REN0
TB80
RB80
TI0
Table 13: The S0CON Register
Serial Interface 1 Control Register (S1CON).
The function of the serial port depends on the setting of the Serial Port Control Register S1CON.
MSB LSB
SM RI1
-
SM21
REN1
TB81
RB81
TI1
Table 14: The S1CON register
Bit
S0CON.7
Symbol
Function
These two bits set the UART0 mode:
SM0
Mode
Description
SM0
SM1
0
N/A
0
0
1
0
1
1
2
3
8-bit UART
9-bit UART
9-bit UART
0
1
1
S0CON.6
SM1
S0CON.5
S0CON.4
S0CON.3
SM20
REN0
TB80
Enables the inter-processor communication feature.
If set, enables serial reception. Cleared by software to disable reception.
The 9th transmitted data bit in Modes 2 and 3. Set or cleared by the
MPU, depending on the function it performs (parity check, multiprocessor
communication etc.)
S0CON.2
RB80
In Modes 2 and 3 it is the 9th data bit received. In Mode 1, if SM20 is 0,
RB80 is the stop bit. In Mode 0 this bit is not used. Must be cleared by
software.
S0CON.1
S0CON.0
TI0
RI0
Transmit interrupt flag, set by hardware after completion of a serial
transfer. Must be cleared by software.
Receive interrupt flag, set by hardware after completion of a serial
reception. Must be cleared by software.
Table 15: The S0CON Bit Functions
Page: 22 of 75
© 2006 TERIDIAN Semiconductor Corporation
REV 1.0
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
