TS80C52X2
Table 7. T2MOD Register
T2MOD - Timer 2 Mode Control Register (C9h)
7
-
6
-
5
-
4
-
3
-
2
-
1
0
T2OE
DCEN
Bit
Number
Bit
Mnemonic
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
7
6
5
4
3
2
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
-
-
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Timer 2 Output Enable bit
1
0
T2OE
Clear to program P1.0/T2 as clock input or I/O port.
Set to program P1.0/T2 as clock output.
Down Counter Enable bit
DCEN
Clear to disable timer 2 as up/down counter.
Set to enable timer 2 as up/down counter.
Reset Value = XXXX XX00b
Not bit addressable
Rev. B - Jan. 25, 1999
17
Preliminary
TEMIC [ TEMIC SEMICONDUCTORS ]
