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TC4469 参数 Datasheet PDF下载

TC4469图片预览
型号: TC4469
PDF下载: 下载PDF文件 查看货源
内容描述: 逻辑输入CMOS Quad驱动程序 [LOGIC-INPUT CMOS QUAD DRIVERS]
分类和应用: 输入元件驱动
文件页数/大小: 9 页 / 121 K
品牌: TELCOM [ TELCOM SEMICONDUCTOR, INC ]
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LOGIC-INPUT CMOS
QUAD DRIVERS
TC4467
TC4468
TC4469
ELECTRICAL CHARACTERISTICS:
Measured throughout operating temperature range with 4.5V
V
DD
18V,
unless otherwise specified.
Symbol
Input
V
IH
V
IL
I
IN
Logic 1, High Input Voltage
Logic 0, Low Input Voltage
Input Current
High Output Voltage
Low Output Voltage
Output Resistance
Peak Output Current
Latch-Up Protection
Withstand Reverse Current
Rise Time
Fall Time
Delay Time
Delay Time
Power Supply Current
Power Supply Voltage
(Note 3)
(Note 3)
0V
V
IN
V
DD
I
LOAD
= 100
µA
(Note 1)
I
LOAD
= 10 mA (Note 1)
I
OUT
= 10 mA, V
DD
= 18V
4.5V
V
DD
16V
2.4
– 10
V
DD
– 0.025
500
20
1.2
0.8
10
0.30
30
V
V
µA
V
V
A
mA
1
Parameter
Test Conditions
Min
Typ
Max
Unit
2
3
4
5
6
7
Output
V
OH
V
OL
R
O
I
PK
I
Switching Time
t
R
t
F
t
D1
t
D2
I
S
I
S
Figure 1
Figure 1
Figure 1
Figure 1
4.5
50
50
100
100
8
18
nsec
nsec
nsec
nsec
mA
V
Power Supply
Note 2
NOTES:
1. Totem-pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to
drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device.
2. When driving all four outputs simultaneously in the same direction, V
DD
shall be limited to 16V. This reduces the chance that internal
dv/dt will cause high-power dissipation in the device.
3. The input threshold has about 50 mV of hysteresis centered at approximately 1.5V. Slow moving inputs will force the device to
dissipate high peak currents as the input transitions through this band. Input rise times should be kept below 5
µs
to avoid high internal
peak currents during input transitions. Static input levels should also be maintained above the maximum or below the minimum input
levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device.
PIN CONFIGURATIONS
16-Pin SOIC (Wide)
1A
1B
2A
2B
3A
3B
GND
GND
1
2
3
4
5
6
7
8
16
15
14
13
V
DD
V
DD
1Y
2Y
3Y
4Y
4B
4A
14-Pin Plastic DIP/CerDIP
1A 1
1B 2
2A 3
2B 4
3A 5
3B 6
GND 7
14 V
DD
13 1Y
12 2Y
TC4467/8/9
12
11
10
9
TC4467/8/9
11 3Y
10 4Y
9
8
4B
4A
8
4-263
TELCOM SEMICONDUCTOR, INC.