TCS3404, TCS3414
DIGITAL COLOR SENSORS
TAOS137A − APRIL 2011
APPLICATION INFORMATION: SOFTWARE
Interrupts
The interrupt feature of the TCS3404/14 device simplifies and improves system efficiency by eliminating the
need to poll the sensor for a light intensity value. Interrupt mode is determined by the INTR field in the Interrupt
Control Register. The interrupt feature may be disabled by writing a field value of 00h to the Interrupt Control
Register (02h) so that polling can be performed.
The versatility of the interrupt feature provides many options for interrupt configuration and usage. The primary
purpose of the interrupt function is to signal a meaningful change in light intensity. However, it also be used as
an end-of-conversion signal. The concept of a meaningful change can be defined by the user both in terms of
light intensity and time, or persistence, of that change in intensity. The TCS3404/14 device implements two
16-bit-wide interrupt threshold registers that allow the user to define thresholds above and below a desired light
level. An interrupt will then be generated when the value of a conversion exceeds either of these limits. For
simplicity of programming, the threshold comparison uses the Interrupt Source Register (03h) to select which
ADC channel (1 through 4) to generate the interrupt. This simplifies calculation of thresholds that are based on
a percent of the current light level. For example, it is adequate to use only one channel (e.g. green channel) when
calculating light intensity differences since, for a given light source, channel values are linearly proportional to
each other and thus each value scales linearly with light intensity.
To further control when an interrupt occurs, the TCS3404/14 device provides an interrupt persistence feature.
This feature allows the user to specify the length in time of the number of consecutive ADC channel values for
which a light intensity exceeding either interrupt threshold must persist before actually generating an interrupt.
This can be used to prevent transient changes in light intensity from generating an unwanted interrupt. See
Table 6 regarding the number of timer values provided.
Two different interrupt styles are available: Level and SMBus Alert. The difference between these two interrupt
styles is how they are cleared. Both result in the interrupt line going active low and remaining low until the
interrupt is cleared. A level style interrupt is cleared by setting the Interrupt Clear field in the the COMMAND
register to 11b. The SMBus Alert style interrupt is cleared by an Alert Response as described in the Interrupt
Control Register section and SMBus specification.
To configure the interrupt as an end−of−conversion signal so that every ADC integration cycle generates an
interrupt, the interrupt PERSIST field in the Interrupt Control Register (02h) is set to 000b. Either Level or SMBus
Alert style can be used. An interrupt will be generated upon completion of each conversion. The interrupt
threshold registers are ignored. The following example illustrates the configuration of a level interrupt:
// Set up end−of−conversion interrupt, Level style
Address = 0x39
Command = 0x83
Data = 0x01
//Slave address − alternatively 0x29 or 0x49
//Interrupt Source Register
//Select Channel 2
WriteByte(Address, Command, Data)
Command = 0x82
Data = 0x10
//Address Interrupt Register
//Level style, every ADC cycle
WriteByte(Address, Command, Data)
Copyright E 2011, TAOS Inc.
The LUMENOLOGY r Company
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