欢迎访问ic37.com |
会员登录 免费注册
发布采购

CC2510F8RSP 参数 Datasheet PDF下载

CC2510F8RSP图片预览
型号: CC2510F8RSP
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller]
分类和应用: 存储射频控制器
文件页数/大小: 244 页 / 2899 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
 浏览型号CC2510F8RSP的Datasheet PDF文件第66页浏览型号CC2510F8RSP的Datasheet PDF文件第67页浏览型号CC2510F8RSP的Datasheet PDF文件第68页浏览型号CC2510F8RSP的Datasheet PDF文件第69页浏览型号CC2510F8RSP的Datasheet PDF文件第71页浏览型号CC2510F8RSP的Datasheet PDF文件第72页浏览型号CC2510F8RSP的Datasheet PDF文件第73页浏览型号CC2510F8RSP的Datasheet PDF文件第74页  
C2510Fx / CC2511Fx  
Bit  
7:5  
4
Name  
Description  
Reserved, write as 0  
Boot Block Lock  
BBLOCK  
0
1
Page 0 is write protected  
Page 0 is writeable, unless LSIZE is 000  
3:1  
LSIZE[2:0]  
Lock Size. Sets the size of the upper flash area which is write-protected. Byte  
sizes are listed below  
000 32 KB (all pages)  
001 24 KB  
010 16 KB  
011 8 KB  
CC2510F32 and CC2511F32 only  
CC2510F32 and CC2511F32 only  
CC2510F32 and CC2511F32 only  
CC2510F32 and CC2511F32 only  
CC2510F32 and CC2511F32 only  
CC2510F32 and CC2511F32 only  
100 4 KB  
101 2 KB  
110 1 KB  
111 0 bytes (no pages)  
Debug lock bit  
0
DBGLOCK  
0
1
Disable debug commands  
Enable debug commands  
Table 44: Flash Lock Protection Bits Definition  
12.4 Debug Commands  
The debug commands are shown in Table 45.  
Some of the debug commands are described  
in further detail in the following sections  
hardware breakpoints. When a hardware  
breakpoint is enabled it will compare the CPU  
address bus with the breakpoint. When a  
match occurs, the CPU is halted.  
12.4.1 Debug Configuration  
When issuing the SET_HW_BRKPNT debug  
command, the external host must supply three  
data bytes that define the hardware  
breakpoint. The hardware breakpoint itself  
consists of 18 bits while three bits are used for  
control purposes. The format of the three data  
bytes for the SET_HW_BRKPNT command is  
as follows.  
The  
commands  
WR_CONFIG  
and  
RD_CONFIG are used to access the debug  
configuration data byte. The format and  
description of this configuration data is shown  
in Table 46  
12.4.2 Debug Status  
The first data byte consists of the following:  
A debug status byte is read using the  
READ_STATUS command. The format and  
description of this debug status is shown in  
Table 47.  
Bit Description  
The READ_STATUS command is used e.g.  
for polling the status of flash chip erase after a  
CHIP_ERASE command or oscillator stable  
status required for debug commands HALT,  
RESUME, DEBUG_INSTR, STEP_REPLACE,  
and STEP_INSTR.  
7:5 Unused  
4:3 Breakpoint number; 0 - 3  
2
Breakpoint enable  
0
1
Disable  
Enable  
1:0 Reserved. Must be 00.  
12.4.3 Hardware Breakpoints  
The debug command SET_HW_BRKPNT is  
used to set a hardware breakpoint. The  
The second data byte consists of bits 15 - 8 of  
the hardware breakpoint while the third data  
byte consists of bits 7-0 of the hardware  
CC2510Fx/CC2511Fx  
supports up to four  
SWRS055D  
Page 70 of 243