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CC2510F8RSP 参数 Datasheet PDF下载

CC2510F8RSP图片预览
型号: CC2510F8RSP
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller]
分类和应用: 存储射频控制器
文件页数/大小: 244 页 / 2899 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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C2510Fx / CC2511Fx  
Parameter  
Min  
Typ  
Max  
Unit Condition/Note  
250 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0  
(MSK, 1% packet error rate, 20 bytes packet length, 540 kHz digital channel filter bandwidth)  
Receiver  
-90  
dBm See Table 9 for typical variation over operating conditions  
sensitivity  
Saturation  
-11  
21  
dBm  
Adjacent  
channel  
rejection  
dB  
dB  
Desired channel 3 dB above the sensitivity limit. 750 kHz channel  
spacing  
Alternate  
channel  
rejection  
30  
Desired channel 3 dB above the sensitivity limit. 750 kHz channel  
spacing  
See Figure 56 for plot of selectivity versus frequency offset  
Blocking  
±10 MHz offset  
±20 MHz offset  
±50 MHz offset  
46  
53  
55  
dB  
dB  
dB  
Wanted signal 3 dB above sensitivity level.  
Compliant with ETSI EN 300 440 class 2 receiver requirements.  
500 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0 (MDMCFG2.DEM_DCFILT_OFF=1cannot  
be used for data rates >100 kBaud)  
(MSK, 1% packet error rate, 20 bytes packet length, 812 kHz digital channel filter bandwidth)  
Receiver  
-82  
dBm  
sensitivity  
Saturation  
-15  
12  
dBm  
dB  
Adjacent  
channel  
rejection  
Desired channel 3 dB above the sensitivity limit. 1 MHz channel spacing  
Desired channel 3 dB above the sensitivity limit. 1 MHz channel spacing  
See Figure 58 for plot of selectivity versus frequency offset  
Alternate  
channel  
rejection  
23  
dB  
General  
Spurious  
emissions  
Conducted measurement in a 50 single ended load. Complies with EN  
300 328, EN 300 440 class 2, FCC CFR47, Part 15 and ARIB STD-T-66.  
25 MHz –  
1 GHz  
-57  
-47  
dBm  
dBm  
Above 1 GHz  
Table 8: RF Receive Section  
Supply Voltage, VDD = 2 V  
Supply Voltage, VDD = 3 V  
Supply Voltage, VDD = 3.6 V  
Temperature [°C]  
Sensitivity [dBm]  
-40  
+25  
+85  
-40  
-90  
+25  
+85  
-40  
+25  
+85  
-91.5  
-90.3  
-88.7  
-89.6  
-88.1  
-88.7  
-89.3  
-88.4  
Table 9: Typical Variation in Sensitivity over Temperature and Supply Voltage @ 2.44 GHz and  
250 kBaud Data Rate  
SWRS055D  
Page 14 of 243  
 
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