CC2430
8051 CPU : Interrupts
IRCON2 (0xE8) – Interrupt Flags 5
Bit
Name
-
Reset
R/W
Description
7:5
00
R/W
Not used
4
3
2
1
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
WDTIF – Watchdog timer interrupt flag.
WDTIF
0
1
Interrupt not pending
Interrupt pending
P1IF – Port 1 interrupt flag.
P1IF
0
1
Interrupt not pending
Interrupt pending
UTX1IF – USART1 TX interrupt flag.
UTX1IF
UTX0IF
P2IF
0
1
Interrupt not pending
Interrupt pending
UTX0IF – USART0 TX interrupt flag.
0
1
Interrupt not pending
Interrupt pending
P2IF – Port2 interrupt flag.
0
1
Interrupt not pending
Interrupt pending
11.5.3
Interrupt Priority
The interrupts are grouped into six interrupt
priority groups and the priority for each group
is set by the registers IP0and IP1. In order to
assign a higher priority to an interrupt, i.e. to its
interrupt group, the corresponding bits in IP0
and IP1must be set as shown in Table 31 on
page 58.
progress, it cannot be interrupted by a lower or
same level interrupt.
In the case when interrupt requests of the
same
priority
level
are
received
simultaneously, the polling sequence shown in
Table 33 is used to resolve the priority of each
request. Note that the polling sequence in
Figure 10 is the algorithm fond in Table 33, not
that polling is among the IP bits as listed in the
figure.
The interrupt priority groups with assigned
interrupt sources are shown in Table 32. Each
group is assigned one of four priority levels.
While an interrupt service request is in
IP1 (0xB9) – Interrupt Priority 1
Bit
Name
Reset
R/W
Description
7:6
00
R/W
Not used.
-
5
4
3
2
1
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Interrupt group 5, priority control bit 1, refer to Table 32: Interrupt
Priority Groups
IP1_IPG5
Interrupt group 4, priority control bit 1, refer to Table 32: Interrupt
Priority Groups
IP1_IPG4
IP1_IPG3
IP1_IPG2
IP1_IPG1
IP1_IPG0
Interrupt group 3, priority control bit 1, refer to Table 32: Interrupt
Priority Groups
Interrupt group 2, priority control bit 1, refer to Table 32: Interrupt
Priority Groups
Interrupt group 1, priority control bit 1, refer to Table 32: Interrupt
Priority Groups
Interrupt group 0, priority control bit 1, refer to Table 32: Interrupt
Priority Groups
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 57 of 211