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CC2430F32RTC 参数 Datasheet PDF下载

CC2430F32RTC图片预览
型号: CC2430F32RTC
PDF下载: 下载PDF文件 查看货源
内容描述: 真正的系统级芯片解决方案的2.4 GHz IEEE 802.15.4 / ZigBee的 [A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee]
分类和应用: 电信集成电路
文件页数/大小: 212 页 / 1862 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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CC2430  
8051 CPU : CPU Registers  
11.3.3  
Program Status Word  
The Program Status Word (PSW) contains  
several bits that show the current state of the  
CPU. The Program Status Word is accessible  
as an SFR and it is bit-addressable. PSW is  
shown below and contains the Carry flag,  
Auxiliary Carry flag for BCD operations,  
Register Select bits, Overflow flag and Parity  
flag. Two bits in PSWare uncommitted and can  
be used as user-defined status flags.  
PSW (0xD0) – Program Status Word  
Bit  
Name  
Reset  
R/W  
Description  
7
0
R/W  
Carry flag. Set to 1 when the last arithmetic operation  
resulted in a carry (during addition) or borrow (during  
subtraction), otherwise cleared to 0 by all arithmetic  
operations.  
CY  
6
0
R/W  
Auxiliary carry flag for BCD operations. Set to 1 when the  
last arithmetic operation resulted in a carry into (during  
addition) or borrow from (during subtraction) the high order  
nibble, otherwise cleared to 0 by all arithmetic operations.  
AC  
5
0
R/W  
R/W  
User-defined, bit-addressable  
F0  
4:3  
00  
Register bank select bits. Selects which set of R7-R0  
registers to use from four possible register banks in DATA  
space.  
RS[1:0]  
00  
01  
10  
11  
Register Bank 0, 0x00 – 0x07  
Register Bank 1, 0x08 – 0x0F  
Register Bank 2, 0x10 – 0x17  
Register Bank 3, 0x18 – 0x1F  
2
0
R/W  
Overflow flag, set by arithmetic operations. Set to 1 when  
the last arithmetic operation resulted in a carry (addition),  
borrow (subtraction), or overflow (multiply or divide).  
Otherwise, the bit is cleared to 0 by all arithmetic  
operations.  
OV  
1
0
0
0
R/W  
R/W  
User-defined, bit-addressable  
F1  
P
Parity flag, parity of accumulator set by hardware to 1 if it  
contains an odd number of 1’s, otherwise it is cleared to 0  
11.3.4  
Accumulator  
ACC is the accumulator. This is the source  
and destination of most arithmetic instructions,  
data transfers and other instructions. The  
mnemonic for the accumulator (in instructions  
involving the accumulator) refers to A instead  
of ACC.  
ACC (0xE0) – Accumulator  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
0x00  
R/W  
Accumulator  
ACC[7:0]  
11.3.5  
B Register  
The B register is used as the second 8-bit  
argument during execution of multiply and  
divide instructions. When not used for these  
purposes it may be used as a scratch-pad  
register to hold temporary data.  
B (0xF0) – B Register  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
0x00  
R/W  
B register. Used in MUL/DIV instructions.  
B[7:0]  
CC2430 Data Sheet (rev. 2.1) SWRS036F  
Page 43 of 211  
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