CC2430
8051 CPU : Memory
Secondly, two alternative schemes for CODE
memory space mapping can be used. The first
scheme is the standard 8051 mapping where
only the program memory i.e. flash memory is
mapped to CODE memory space. This
mapping is the default used after a device
reset.
The memory map showing how the different
physical memories are mapped into the CPU
memory spaces is given in the figures on the
following pages for 128 KB flash memory size
option only. The other flash options are
reduced versions of the F128 with natural
limitations.
The second scheme is an extension to the
standard CODE space mapping in that all
physical memory is mapped to the CODE
space region. This second scheme is called
unified mapping of the CODE memory space.
Note that for CODE memory space, the two
alternative memory maps are shown; unified
and non-unified (standard) mapping.
For users familiar with the 8051 architecture,
the standard 8051 memory space is shown as
“8051 memory spaces” in the figures.
Details about mapping of all 8051 memory
spaces are given in the next section.
0xFFFF
0xFF00
0xFF
0x00
0xFFFF
DATA
memory space
Fast access RAM
8 KB SRAM
Slow access RAM /
program memory in RAM
0xDFFF
0xFF
0x80
SFR
memory sp
ace
SFR registers
RF registers
0xE000
0xDFFF
0xDF80
Registers
0xFFFF
0xDF00
0xDEFF
0xFFFF
0xDF00
XDATA memory space
Non-volatile program memory
56 KB
128 KB Flash
0xDEFF
lower 56 KB
0x0000
0x0000
0x0000
CC2430-F128 XDATA memory
space
8051 memory spaces
Physical memory
Figure 7: CC2430-F128 XDATA memory space
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 31 of 211
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