CC2430
Peripherals
: DMA Controller
DMA1CFGL (0xD2) – DMA Channel 1-4 Configuration Address Low Byte
Bit
Name
Reset
R/W
Description
7:0
DMA1CFG[7:0]
0x00
R/W
The DMA channel 1-4 configuration address, low order
DMAIRQ (0xD1) – DMA Interrupt Flag
Bit
7:5
4
Name
-
Reset
000
0
R/W
Description
R/W0
R/W0
Not used
DMAIF4
DMA channel 4 interrupt flag.
0 : DMA channel transfer not complete
1 : DMA channel transfer complete/interrupt pending
3
2
1
0
DMAIF3
DMAIF2
DMAIF1
DMAIF0
0
0
0
0
R/W0
R/W0
R/W0
R/W0
DMA channel 3 interrupt flag.
0 : DMA channel transfer not complete
1 : DMA channel transfer complete/interrupt pending
DMA channel 2 interrupt flag.
0 : DMA channel transfer not complete
1 : DMA channel transfer complete/interrupt pending
DMA channel 1 interrupt flag.
0 : DMA channel transfer not complete
1 : DMA channel transfer complete/interrupt pending
DMA channel 0 interrupt flag.
0 : DMA channel transfer not complete
1 : DMA channel transfer complete/interrupt pending
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 98 of 211