CC2430
Debug Interface : Debug Lock Bit
Table 35: Debug Commands
Command
Instruction code
Description
CHIP_ERASE
0001 0000
Perform flash chip erase (mass erase) and clear lock bits. If any other
command, except READ_STATUS, is issued, then the use of
CHIP_ERASE is disabled.
WR_CONFIG
RD_CONFIG
GET_PC
0001 1001
0010 0100
Write configuration data. Refer to Table 36 for details
Read configuration data. Returns value set by WR_CONFIG command.
Return value of 16-bit program counter. Returns 2 bytes regardless of
value of bit 2 in instruction code
0010 1000
READ_STATUS
SET_HW_BRKPNT
HALT
0011 0000
0011 1111
0100 0100
0100 1100
Read status byte. Refer to Table 37
Set hardware breakpoint
Halt CPU operation
RESUME
Resume CPU operation. The CPU must be in halted state for this
command to be run.
DEBUG_INSTR
0101 01yy
Run debug instruction. The supplied instruction will be executed by the
CPU without incrementing the program counter. The CPU must be in
halted state for this command to be run. Note that yyis number of bytes
following the command byte, i.e. how many bytes the CPU instruction has
(see Table 28)
STEP_INSTR
0101 1100
0110 01yy
Step CPU instruction. The CPU will execute the next instruction from
program memory and increment the program counter after execution.
The CPU must be in halted state for this command to be run.
STEP_REPLACE
Step and replace CPU instruction. The supplied instruction will be
executed by the CPU instead of the next instruction in program memory.
The program counter will be incremented after execution. The CPU must
be in halted state for this command to be run. Note that yyis number of
bytes following the command byte, i.e. how many bytes the CPU
instruction has (see Table 28)
GET_CHIP_ID
0110 1000
Return value of 16-bit chip ID and version number. Returns 2 bytes
regardless of value of bit 2 of instruction code
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 62 of 211
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