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CC1110FX 参数 Datasheet PDF下载

CC1110FX图片预览
型号: CC1110FX
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗低于1 GHz的射频系统级芯片(SoC )与MCU,存储器,收发器和USB控制器 [Low-power sub-1 GHz RF System-on-Chip (SoC) with MCU, memory, transceiver, and USB controller]
分类和应用: 存储射频控制器
文件页数/大小: 240 页 / 2823 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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CC1110Fx / CC1111Fx  
MEMCTR (0xC7) – Memory Arbiter Control  
Bit  
Name  
Reset  
R/W  
Description  
7:2  
0
R/W  
Not used  
1
0
R/W  
Flash cache disable. Invalidates contents of instruction cache and forces all  
instruction read accesses to read straight from flash memory. Disabling will  
increase power consumption and is provided for debug purposes.  
CACHDIS  
0
1
Cache enabled  
Cache disabled  
0
1
R/W  
Flash prefetch disable. When set prefetch of flash data is disabled, when  
cleared the next two bytes in flash are fetched when last byte in cache is  
read.  
PREFDIS  
0
1
Prefetch enabled  
Prefetch disabled  
11.3 CPU Registers  
MOVC A,@A+DPTR  
MOV A,@DPTR.  
This section describes the internal registers  
found in the CPU.  
The data pointer select bit, bit 0 in the Data  
Pointer Select register DPS, chooses which  
data pointer to use during the execution of an  
instruction that uses the data pointer, e.g. in  
one of the above instructions.  
11.3.1 Data Pointers  
The CC1110Fx/CC1111Fx has two data pointers,  
DPTR0 and DPTR1, to accelerate the  
movement of data blocks to/from memory. The  
data pointers are generally used to access  
CODE or XDATA space e.g.  
The data pointers are two bytes wide  
consisting of the following SFRs:  
DPTR0 – DPH0:DPL0  
DPTR1 – DPH1:DPL1  
DPH0 (0x83) – Data Pointer 0 High Byte  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
DPH0[7:0]  
0
R/W  
Data pointer 0, high byte  
DPL0 (0x82) – Data Pointer 0 Low Byte  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
DPL0[7:0]  
0
R/W  
Data pointer 0, low byte  
DPH1 (0x85) – Data Pointer 1 High Byte  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
DPH1[7:0]  
0
R/W  
Data pointer 1, high byte  
DPL1 (0x84) – Data Pointer 1 Low Byte  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
DPL1[7:0]  
0
R/W  
Data pointer 1, low byte  
DPS (0x92) – Data Pointer Select  
Bit  
7:1  
0
Name  
Reset  
R/W  
R/W  
R/W  
Description  
0
0
Not used  
DPS  
Data pointer select  
0
1
DPTR0  
DPTR1  
SWRS033E  
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