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CC1110FX 参数 Datasheet PDF下载

CC1110FX图片预览
型号: CC1110FX
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗低于1 GHz的射频系统级芯片(SoC )与MCU,存储器,收发器和USB控制器 [Low-power sub-1 GHz RF System-on-Chip (SoC) with MCU, memory, transceiver, and USB controller]
分类和应用: 存储射频控制器
文件页数/大小: 240 页 / 2823 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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CC1110Fx / CC1111Fx  
21 General Information  
21.1 Document History  
Revision  
Date  
Description/Changes  
SWRS033  
SWRS033A  
SWRS033B  
2006.01.04 First release  
2006.05.11 Preliminary status updated  
2007.09.14 First data sheet for released product.  
Preliminary data sheets exist for engineering samples and pre-production prototype devices,  
but these data sheets are not complete and may be incorrect in some aspects compared with  
the released product.  
SWRS033C  
2007.09.20 Data sheet update before release of product.  
- Operating frequency range changed to 391-464 MHz and 782-928 MHz  
- Changed restrivted range for PA power in section 14.15 (now 0x68 to 0x6F)  
- Added information about register TEST1when TX-if-CCA is to be used  
- Changed register FREQEST and FSCTRL0 max range from ±20910 to ±209  
- Added reference to SmartRF studio for register MCSM0.  
- Changed bit description for bit FSCAL2.VCO_CORE_H_EN  
- Added section 13.1.5.2, describing data rate limitations caused by system clock speed  
- Added power numbers for RX (Table 6) when using other system clock speeds  
SWRS033D  
2007.10.19  
Data sheet update before release of CC1111Fx.  
-Electrical Specification section 7 updated with CC1111Fx performance  
-Minimum powerdown time of CC1110Fx high speed crystal oscillator stated in section 7.4.1,  
section 7.4.2, section 13.1.1 and section 13.1.5.1.  
- Removed 3rd overtone crystal option for CC1111Fx  
-Replaced Figure 14, Figure 15, and Figure 16 to apply for these devices and correct address  
ranges.  
-Fixed Table 32  
-Fixed bit range for register FADDRH and stated that register WORTIME0 and WORTIME1  
defines a combined 16 bit word (WORTIME)  
- Replaced all occurrences of WORCTL with WORCTRL  
- Made consistent use of VDD for power with reference to power pin if so needed  
- Corrected part number for these devices, register PARTNUM  
- Stated that P1_0 and P1_1 does not have PULL capability in register P2INP  
- Corrected code example in Figure 48  
- Corrected unimplemented RAM range in section 11.2.3.1  
- Uppdated sections 13.1.3, 13.1.5.1, and 13.1.5.3 with information about clock source change  
- Rewrote RAM range in section 13.3.2 for executing CODE from RAM  
- Updated section 13.8.2 with information about power modes and code examples  
-Changed heading text for section 13.8.5  
- Corrected receiver symbol write and read location in section 14.11.2  
SWRS033E  
2007.10.26 -Corrected Table of contents  
-Updated guard time and stated for which crystal this applies in Table 11  
Table 80: Document History  
SWRS033E  
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