CC1110Fx / CC1111Fx
18.1 Recommended PCB Layout for Package (QLP 36)
Figure 62: Recommended PCB Layout for QLP 36 Package
Note: The figure is an illustration only and not to scale. There are nine 14 mil diameter via holes
distributed symmetrically in the ground pad under the package. See also the CC1110EM
reference design [1] and theCC1111 USB-Dongle reference design [4].
Thermal Resistance
Air velocity [m/s]
Rth,j-a [C/W]
0
32
Table 76: Thermal Properties of QLP 36 Package
18.2 Soldering information
The recommendations for lead-free reflow in IPC/JEDEC J-STD-020D should be followed. The
lead finish is annealed (150 °C for 1 hr) pure matte tin.
18.3 Tray Specification
Tray Specification
Package
QLP 36
Tray Length
322.6 mm
Tray Width Tray Height
135.9 mm 7.62 mm
Units per Tray
490
Table 77: Tray Specification
SWRS033E
Page 232 of 239
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
