CC1110Fx / CC1111Fx
Baud rate
[bps]
UxBAUD.BAUD_M UxGCR.BAUD_E Error (%)
2400
131
131
131
34
6
0.04
0.04
0.04
0.13
0.04
0.13
0.04
0.13
0.04
0.13
0.13
4800
7
9600
8
14400
19200
28800
38400
57600
76800
115200
230400
9
131
34
9
10
10
11
11
12
13
131
34
131
34
34
Table 55: Commonly used Baud Rate Settings for 26 MHz System Clock
Baud rate
[bps]
UxBAUD.BAUD_M UxGCR.BAUD_E Error (%)
2400
163
163
163
59
6
0.08
0.08
0.09
0.13
0.10
0.14
0.10
0.14
0.10
0.14
0.14
4800
7
9600
8
14400
19200
28800
38400
57600
76800
115200
230400
9
163
59
9
10
10
11
11
12
13
163
59
163
59
59
Table 56: Commonly used Baud Rate Settings for 24 MHz System Clock
13.14.4 USART Flushing
different modes of operation (UART RX, UART
TX, SPI master, and SPI Slave).
The current operation can be aborted
(operation stopped and all data buffers
The interrupt enables and flags are
summarized below.
cleared)
by
setting
UxUCR.FLUSH=1.Asserting the FLUSH bit
should either be aligned with USART interrupts
or a wait time of one bit duration (at current
baud rate) should be added after setting the bit
to 1 before accessing the USART registers.
Interrupt enable bits:
• USART0 RX : IEN0.URX0IE
• USART1 RX : IEN0.URX1IE
• USART0 TX : IEN2.UTX0IE
• USART1 TX : IEN2.UTX1IE
13.14.5 USART Interrupts
Interrupt flags:
Each USART has two interrupts. These are the
USART
(TCON.URXxIF) and the USART
complete interrupt (IRCON2.UTXxIF). The
interrupts are enabled by setting
IEN0.URXxIE=1 and IEN2.UTXxIE=1,
x
RX
complete
interrupt
• USART0 RX : TCON.URX0IF
• USART1 RX : TCON.URX1IF
• USART0 TX : IRCON2.UTX0IF
• USART1 TX : IRCON2.UTX1IF
x
TX
respectively. Please see the previous sections
on how the interrupt flags are asserted in the
SWRS033E
Page 156 of 239
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