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W681308DG 参数 Datasheet PDF下载

W681308DG图片预览
型号: W681308DG
PDF下载: 下载PDF文件 查看货源
内容描述: W681308 USB音频控制器由新唐集成了高速8051微控制器单元(MCU ) [W681308 USB Audio Controller from Nuvoton integrates fast 8051 Microcontroller Unit (MCU)]
分类和应用: 微控制器
文件页数/大小: 64 页 / 981 K
品牌: NUVOTEM TALEMA [ NUVOTEM TALEMA ]
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W681308  
14.  
14.1  
Serial Peripheral Interface  
Overview  
W681308 built in a serial peripheral interface (SPI) port which is a 4-pin (SCLK, CS, SDI, SDO) SPI Interface. This SPI  
interface makes W681308 an easy to control 4-pin SPI device including SPI data flash, SPI LCM, Nuvoton Pro-X SLIC  
CODEC etc. This device has various clock speed and data format by setting relative control registers. The SPI module can  
be operated at clock rates of up to MCU clock rate.  
Figure 12 SPI Block Diagram  
14.2  
Data and Signal Format of SPI  
There are 5 control bits (CSN_ADD, CSN_MORE, CK_MORE, CP and CI) to decide the SPI control signal format. Register  
0x14AB has detail description of the control bits.  
The packet and page data format is separated to 2 fields: Command field and the Data field. Command field (0 ~ 5 bytes)  
consists of control instruction/code and access address (TX only). Data field (0 ~ 256 bytes) consists of write and read data  
of serial data flash (TX/RX). All Command and Data bytes are send MSB first. Command and Data field length can be  
programmed in CMD_LEN (0x14A1[2:0]) and DATA_LEN (0x14A2[7:0]) register fields. It can be bypassed to write control bit  
CMD_BYPASS or disable the DATA_ENB. The max command field length is 5 bytes. The max data field length is 256 bytes  
in unidirectional mode, and 128 bytes in bidirectional mode. Thirteen examples are provided for reference.  
14.3  
FSM of SPI  
There are 3 states in the SPI Finite State Machine (FSM) module. The initial state is IDLE when power on.  
IDLE  
ƒ
After enable the SPI function (write 0x14A0[7] =1), the FSM start to wait for MCU control (write 0x14A1) to change to next  
state. If the CMD BYPASS flag (0x14A1[5]) is true, the FSM will change to DATA state, then force control logic to shift in/out  
the data bytes sequentially. If the CMD BYPASS flag ( 0x14A1[5]) is false, the FSM will change to the CMD state, then force  
control logic to shift out the command bytes sequentially to external SPI device.  
ƒ
Command (CMD)  
47  
Rev1.2  
 
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