SM59R16A5/SM59R09A5/SM59R05A5
8-Bit Micro-controller
64KB/36KB/20KB with ISP Flash
& 2KB RAM embedded
4.3. Program Status Word
Mnemonic: PSW
Address: D0h
7
CY
6
AC
5
F0
4
3
2
OV
1
F1
0
P
Reset
00h
RS [1:0]
CY: Carry flag.
AC: Auxiliary Carry flag for BCD operations.
F0: General purpose Flag 0 available for user.
RS[1:0]: Register bank select, used to select working register bank.
RS[1:0]
Bank Selected
Bank 0
Location
00h – 07h
08h – 0Fh
10h – 17h
18h – 1Fh
00
01
10
11
Bank 1
Bank 2
Bank 3
OV: Overflow flag.
F1: General purpose Flag 1 available for user.
P: Parity flag, affected by hardware to indicate odd/even number of “one” bits in the
Accumulator, i.e. even parity.
4.4. Stack Pointer
The stack pointer is a 1-byte register initialized to 07h after reset. This register is incremented before PUSH and CALL
instructions, causing the stack to start from location 08h.
Mnemonic: SP
Address: 81h
7
6
5
4
3
2
1
0
Reset
SP [7:0]
07h
SP[7:0]: The Stack Pointer stores the scratchpad RAM address where the stack begins. In other
words, it always points to the top of the stack.
4.5. Data Pointer
The data pointer (DPTR) is 2-bytes wide. The lower part is DPL, and the highest is DPH. It can be loaded as a 2-byte
register (e.g. MOV DPTR, #data16) or as two separate registers (e.g. MOV DPL,#data8). It is generally used to access
the external code or data space (e.g. MOVC A, @A+DPTR or MOVX A, @DPTR respectively).
Mnemonic: DPL
Address: 82h
7
6
5
4
3
2
1
0
Reset
00h
DPL [7:0]
DPL[7:0]: Data pointer Low 0
Mnemonic: DPH
Address: 83h
7
6
5
4
3
2
1
0
Reset
00h
DPH [7:0]
DPH [7:0]: Data pointer High 0
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M047 27 Ver.G SM59R16A5 01/2014
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
