SM59R16A5/SM59R09A5/SM59R05A5
8-Bit Micro-controller
64KB/36KB/20KB with ISP Flash
& 2KB RAM embedded
4. CPU Engine
The SM59R16A5 engine is composed of four components:
a. Control unit
b. Arithmetic – logic unit
c. Memory control unit
d. RAM and SFR control unit
The SM59R16A5 engine allows to fetch instruction from program memory and to execute using RAM or SFR. The
following paragraphs describe the main engine registers.
Mnemonic
Description
Direct
Bit 7
Bit 6
8051 Core
ACC.7 ACC.6 ACC.5 ACC.4 ACC.3 ACC.2 ACC.1 ACC.0
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RESET
ACC
B
Accumulator
B register
E0h
F0h
00H
00H
B.7
B.6
B.5
B.4
B.3
B.2
B.1
B.0
Program status
word
PSW
D0h
CY
AC
F0
RS[1:0]
OV
PSW.1
P
00H
SP
DPL
Stack Pointer
Data pointer low 0
Data pointer high
0
Data pointer low 1
Data pointer high
1
81h
82h
SP[7:0]
DPL[7:0]
07H
00H
DPH
DPL1
DPH1
83h
84h
85h
DPH[7:0]
DPL1[7:0]
DPH1[7:0]
00H
00H
00H
P4UR
P2PW
M
AUX
Auxiliary register
91h
86h
8Fh
BRGS
ITS
-
P4SPI
-
P4IIC
P0KBI
DPS
00H
00H
00H
1
Internal RAM
control register
Interface control
register
RCON
IFCON
RCON[7:0]
CDPR
-
ALEC[1:0]
EMEN
ISPE
4.1. Accumulator
ACC is the Accumulator register. Most instructions use the accumulator to store the operand.
Mnemonic: ACC Address: E0h
7
6
5
4
3
2
1
0
Reset
00h
ACC.7 ACC.6 ACC05 ACC.4 ACC.3 ACC.2 ACC.1 ACC.0
ACC[7:0]: The A (or ACC) register is the standard 8052 accumulator.
4.2. B Register
The B register is used during multiply and divide instructions. It can also be used as a scratch pad register to store
temporary data.
Mnemonic: B
Address: F0h
7
B.7
6
B.6
5
B.5
4
B.4
3
B.3
2
B.2
1
B.1
0
B.0
Reset
00h
B[7:0]: The B register is the standard 8052 register that serves as a second accumulator.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M047
26
Ver.G SM59R16A5 01/2014
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
