SM59R16A5/SM59R09A5/SM59R05A5
8-Bit Micro-controller
64KB/36KB/20KB with ISP Flash
& 2KB RAM embedded
Priority level structure
All interrupt sources are combined in groups:
Table 11-2: Priority level groups
Groups
External interrupt 0
Timer 0 interrupt
Serial channel 1 interrupt
RTC/ALARM interrupt
PWM interrupt
SPI interrupt
ADC interrupt
KBI interrupt
LVI interrupt
IIC interrupt
External interrupt 1
Timer 1 interrupt
Comparator interrupt
-
-
-
Serial channel 0 interrupt
Timer 2 interrupt
Each group of interrupt sources can be programmed individually to one of four priority levels by setting or clearing one bit
in the special function register IP0 and one in IP1. If requests of the same priority level will be received simultaneously, an
internal polling sequence determines which request is serviced first.
Mnemonic: IP0
Address: A9h
7
6
5
4
3
2
1
0
Reset
-
-
IP0.5
IP0.4
IP0.3
IP0.2
IP0.1
IP0.0
00h
Mnemonic: IP1
Address: B9h
7
-
6
-
5
4
3
2
1
0
Reset
00h
IP1.5
IP1.4
IP1.3
IP1.2
IP1.1
IP1.0
Table 11-3: Priority levels
IP1.x
IP0.x
Priority Level
Level0 (lowest)
0
0
1
1
0
1
0
1
Level1
Level2
Level3 (highest)
Table 11-4: Groups of priority
Group
Bit
IP1.0, IP0.0
IP1.1, IP0.1
IP1.2, IP0.2
IP1.3, IP0.3
IP1.4, IP0.4
IP1.5, IP0.5
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial channel 1 interrupt
RTC/ALARM interrupt
Comparator interrupt
PWM interrupt
SPI interrupt
ADC interrupt
KBI interrupt
LVI interrupt
IIC interrupt
-
-
-
Serial channel 0 interrupt
Timer 2 interrupt
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M047 54 Ver.G SM59R16A5 01/2014
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
