SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
Compare/Capture interrupt share T2 interrupt vector.
Compare/Capture Enable Register( CCEN )
Mnemonic: CCEN
8.4
Address: C1h
7
6
5
4
3
2
1
0
Reset
-
COCAM1[2:0]
-
COCAM0[2:0]
00H
COCAM1[2:0] 000 - Compare/Capture disable
001 - Compare enable but no output on Pin
010 - Compare mode 0
011 - Compare mode 1
100 - Capture on rising edge at pin CC1
101 - Capture on falling edge at pin CC1
110 - Capture on both rising and falling edge at pin CC1
111 - Capture on write operation into register CC1
COCAM0[2:0] 000 - Compare/Capture disable
001 - Compare enable but no output on Pin
010 - Compare mode 0
011 - Compare mode 1
100 - Capture on rising edge at pin CC0
101 - Capture on falling edge at pin CC0
110 - Capture on both rising and falling edge at pin CC0
111 - Capture on write operation into register CC0
8.5
Compare/Capture Enable 2 Register( CCEN2 )
Mnemonic: CCEN2
Address: D1h
7
-
6
5
4
3
-
2
1
0
Reset
00H
COCAM3[2:0]
COCAM2[2:0]
COCAM3[2:0] 000 - Compare/Capture disable
001 - Compare enable but no output on Pin
010 - Compare mode 0
011 - Compare mode 1
100 - Capture on rising edge at pin CC3
101 - Capture on falling edge at pin CC3
110 - Capture on both rising and falling edge at pin CC3
111 - Capture on write operation into register CC3
COCAM2[2:0] 000 - Compare/Capture disable
001 - Compare enable but no output on Pin
010 - Compare mode 0
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071 Ver A SM59A16U1 04/12/2013
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