SyncMOS Technologies Inc.
May 2002
SM59264
Addr
F4H
F5H
F6H
F7H
SFR
ISPFAH
ISPFAL
ISPFD
ISPC
Reset
00H
00H
00H
0*0***00
7
FA15
FA7
FD7
START
6
FA14
FA6
FD6
5
FA13
FA5
FD5
FAU0
4
FA12
FA4
FD4
3
FA11
FA3
FD3
2
FA10
FA2
FD2
1
FA9
FA1
FD1
ISPF1
0
FA8
FA0
FD0
ISPF0
Extension Function Description
1. Memory Structure
The SM59264 is the general 8052 hardware core to integrate the expanded 768 byte data RAM, 64KB flash program mem-
ory with ISP function module and 64KB data flash as a single chip micro controller. Its memory structure follows general 8052
structure plus SM59264 proprietary external RAM structure.
1.1 Program Memory
The SM59264 has 64K byte on-chip flash memory which used as general program memory, on which include up to 4K byte
specific ISP service program memory space. The address range for the 64K byte is $0000 to $FFFF. The address range for
the ISP service program is $F000 to $FFFF. The ISP service program size can be partitioned as N blocks of 512 byte (N=0 to
8). When N=0 means no ISP service program space available, total 64K byte memory used as program memory. When N=1
means memory address $FE00 to $FFFF reserved for ISP service program. When N=2 means memory address $FC00 to
FFFF reserved for ISP service program,...etc. Value N can be set and programmed into SM59264 by writer.
1FFFF
The area need to
have 17th address
bit, A16, for doing
ISP functions:
(byte program,
chip erase, page
erase, protect)
64K data
flash space
10000
FFFF
ISP service
program space
upto 4K
FE00
FC00
FA00
F800
F600
F400
F200
F000
N=0
N=1
N=7
N=8
64K Program
memory space
Specifications subject to change without notice,contact your sales representatives for the most recent information.
6/32
Ver 1.0
PID 59264 05/02
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
