SM39R08A5
8-Bit Micro-controller
with 8KB Flash
& 256B RAM embedded
Interrupt Enable 1 register (IEN1)
Mnemonic: IEN1
Address: B8h
7
-
6
-
5
4
3
-
2
1
-
0
Reset
00h
IEIIC
IELVI
IEADC
IEPWM
IELVI: LVI interrupt enable.
IELVI = 0 – Disable LVI interrupt.
IELVI = 1 – Enable LVI interrupt.
IEIIC: IIC interrupt enable.
IEIICS = 0 – Disable IIC interrupt.
IEIICS = 1 – Enable IIC interrupt.
IEADC: A/D converter interrupt enable
IEADC = 0 – Disable ADC interrupt.
IEADC = 1 – Enable ADC interrupt.
IEPWM: PWM interrupt enable.
IEPWM = 0 – Disable PWM interrupt.
IEPWM = 1 – Enable PWM interrupt.
Interrupt Enable 2 register (IEN2)
Mnemonic: IEN2
Address: 9Ah
7
-
6
-
5
-
4
-
3
-
2
1
0
-
Reset
00H
ECmpI
IEWDT
ECmpI: Enable Comparator 0 interrupt
IEWDT: WDT interrupt enable.
IEWDT = 0 – Disable WDT interrupt.
IEWDT = 1 – Enable WDT interrupt.
Interrupt request register (IRCON)
Mnemonic: IRCON
Address: C0h
7
-
6
-
5
IICIF
4
3
-
2
1
-
0
Reset
00H
LVIIF
ADCIF
PWMIF
LVIIF: LVI interrupt flag. Clear by hardware automatically
IICIF: IIC interrupt flag. Clear by hardware automatically
ADCIF: A/D converter end interrupt flag.
PWMIF: PWM interrupt flag. Clear by hardware automatically
Interrupt request register 2 (IRCON2)
Mnemonic: IRCON2
Address: 97h
Reset
7
-
6
-
5
-
4
-
3
-
2
1
0
-
CmpIF
WDTIF
00H
CmpIF: Comparator interrupt flag
HW will clear this flag automatically when enter interrupt vector.
SW can clear this flag also.(in case analog comparator INT disable)
WDTIF: WDT interrupt flag.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M067 Ver B SM39R08A5 04/22/2013
- 35 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
