SM39A16M1
8-Bit Micro-controller
16KB with ISP Flash
& 1K+256B RAM embedded
Fig. 9-6: Receive modes 2 and 3
9.2 Multiprocessor Communication of Serial Interface
The feature of receiving 9 bits in Modes 2 and 3 of Serial Interface can be used for multiprocessor communication. In
this case, the slave processors have bit SM2 in SCON set to 1. When the master processor outputs slave‟s address, it
sets the 9th bit to 1, causing a serial port receive interrupt in all the slaves. The slave processors compare the received
byte with their network address. If there is a match, the addressed slave will clear SM2 and receive the rest of the
message, while other slaves will leave SM2 bit unaffected and ignore this message. After addressing the slave, the
host will output the rest of the message with the 9th bit set to 0, so no serial port receive interrupt will be generated in
unselected slaves.
9.3 Peripheral Frequency control register
Mnemonic: PFCON
Address: D9h
7
-
6
-
5
4
3
2
1
0
Reset
00H
SRELPS[1:0]
T1PS[1:0]
T0PS[1:0]
SRELPS[1:0]: SREL Prescaler select
SRELPS[1:0]
Prescaler
Fosc/64
Fosc /32
Fosc /16
Fosc /8
00
01
10
11
T1PS[1:0]: Timer1 Prescaler select
T1PS[1:0]
Prescaler
Fosc/12
Fosc
Fosc/96
reserved
00
01
10
11
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M069 Ver C SM39A16M1 7/31/2013
- 52 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
