SM39A16M1
8-Bit Micro-controller
16KB with ISP Flash
& 1K+256B RAM embedded
8.2.2 Compare Mode 1
In compare mode 1, the transition of the output signal can be determined by software. A timer 2 overflow causes no
output change. In this mode, both transitions of a signal can be controlled. As shown in Fig. 8-6 and Fig. 8-7 a
functional diagram of a register/port configuration in compare Mode 1. In compare Mode 1, the value is written first to
the “Shadow Register”, when compare signal is active, this value is transferred to the output register.
Fig. 8-6: Mode 1 Register/Port Function
Contents of
Timer 2
CRC or CCx
Reload value
CCx Shadow Register
CCx Output
Timer 2 = CCx value
Timer 2 = CCx value
Fig. 8-7: Compare mode 1 function
8.3 Capture function
Actual timer/counter contents can be saved into registers CCx or CRC upon an external event (mode 0) or a software
write operation (mode 1).
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M069
Ver C SM39A16M1 7/31/2013
- 47 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
