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HV430 参数 Datasheet PDF下载

HV430图片预览
型号: HV430
PDF下载: 下载PDF文件 查看货源
内容描述: 高压线圈发生器 [High Voltage Ring Generator]
分类和应用: 高压
文件页数/大小: 8 页 / 120 K
品牌: SUPERTEX [ Supertex, Inc ]
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HV430
Pin Description
V
PP1
V
PP2
V
NN1
V
NN2
V
DD
SGnd
PGnd
P
IN
N
IN
ENABLE
MODE
Positive high voltage supply.
Positive gate voltage supply. Generated by an internal linear regulator. A 25V, 100nF capacitor should be
connected between V
PP2
and V
PP1
.
Negative high voltage supply.
Negative gate voltage supply. Generated by an internal linear regulator. A 25V, 100nF capacitor should be
connected between V
NN2
and V
NN1
.
Logic supply voltage.
Low voltage logic ground.
High voltage power ground.
Logic control input. When mode is high, logic input high turns ON the external high voltage P-channel MOSFET.
Internally pulled low.
Logic control input. When mode is high, logic input high turns ON the external high voltage N-channel MOSFET.
Internally pulled low.
Logic enable input. Logic high enables IC. Internally pulled low.
Logic mode input. 0=single-control; 1=dual-control. When MODE is high, N
IN
and P
IN
independently control N
OUT
and P
OUT
, respectively. When MODE is low, N
IN
controls both outputs in a complementary manner.
(See Truth Table)
Logic output. Fault is at logic low when either current limit sense pin, V
Psen
or V
Nsen
, is activated. Remains
active until overcurrent condition clears or ENABLE=0 or RESET=0.
Power-on reset. A capacitor connected between this pin and ground determines the delay time between application
of V
DD
and when the device outputs are enabled. Low leakage tantalum recommended.
A resistor between this pin and ground sets the ‘break-before-make’ time between output transitions. Applicable
only in single-control mode. For minimum deadtime, a 5.6kΩ resistor to ground should be used. For dual-input
mode, tie to Vdd.
Gate drive for external P-channel MOSFET.
Gate drive for external N-channel MOSFET.
Pulse by pulse over current sensing for P-Channel MOSFET.
Pulse by pulse over current sensing for N-Channel MOSFET.
FAULT
RESET
DEADBAND
V
Pgate
V
Ngate
V
Psen
V
Nsen
Pin Configuration
V
DD
Fault
Mode
P
IN
N
IN
Enable
Reset
Deadband
SGND
PGND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
PP2
V
PP1
V
PSEN
V
PGATE
N/C
N/C
V
NGATE
V
NSEN
V
NN1
V
NN2
top view
SOW 20
12/13/010
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
8
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com