HV430 参数 Datasheet PDF下载

HV430

Truth Table

Logic Inputs*

N

IN

L

L

H

H

H

L

X

X

P

IN

L

H

L

H

X

X

X

X

mode

H

H

H

H

L

L

X

X

EN

H

H

H

H

H

H

L

X

RESET

> V

reset(on)

> V

reset(on)

> V

reset(on)

> V

reset(on)

> V

reset(on)

> V

reset(on)

X

< V

reset(off)

Output

External N-Channel

MOSFET

OFF

OFF

ON

OFF

OFF

ON

OFF

OFF

External P-Channel

MOSFET

OFF

ON

OFF

OFF

ON

OFF

OFF

OFF

* Unused logic inputs should be connected to V

DD

or GND.

Block Diagram and Application Circuit

V

PP1

V

DD

+5V

V

PP2

FAULT

De-glitcher

clk

reset

V

DD

V

PP2

Regulator

V

PP1

Down

Translator

Current

Trip

V

PSEN

Rsense

P

IN

Up

Translator

P

Driver

V

PGATE

MODE

DEADBAND

Control

Logic

NC

Ringer

Output

NC

Up

Translator

N

Driver

V

NGATE

N

IN

ENABLE

V

DD

Down

Translator

Current

Trip

V

NSEN

10µA

RESET

SIG

GND

PWR

GND

V

NN2

Regulator

V

NN2

V

NN1

Rsense

V

NN1

Note: P

IN

, N

IN

, and ENABLE are internally pulled low. MODE is internally pulled high.

A Reset capacitor in the range of 1-10µF will yield a couple-second turn-on delay. Tantalum is recommended.

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