欢迎访问ic37.com |
会员登录 免费注册
发布采购

HV301 参数 Datasheet PDF下载

HV301图片预览
型号: HV301
PDF下载: 下载PDF文件 查看货源
内容描述: 热插拔,控制器,断路器 [Hotswap, Controllers with Circuit Breaker]
分类和应用: 断路器控制器
文件页数/大小: 21 页 / 662 K
品牌: SUPERTEX [ Supertex, Inc ]
 浏览型号HV301的Datasheet PDF文件第1页浏览型号HV301的Datasheet PDF文件第2页浏览型号HV301的Datasheet PDF文件第4页浏览型号HV301的Datasheet PDF文件第5页浏览型号HV301的Datasheet PDF文件第6页浏览型号HV301的Datasheet PDF文件第7页浏览型号HV301的Datasheet PDF文件第8页浏览型号HV301的Datasheet PDF文件第9页  
HV301/HV311
General Description, cont’d.
inactive state. Thereafter a programmable auto-retry timer will
hold the device off to allow the pass element to cool before
resetting and restarting. The auto-retry can be disabled using a
single resistor if desired.
The HV301/HV311 includes a current mode servo-circuit which
can be used as a return to limit during input voltage steps such
as would be seen in a diode “ORed” situation when power
switches back to regulated supply from battery operation. The
HV301/HV311 allow independent programming of the trigger
level of this phenomenon so that it may be set at a different level
to the current limit level if desired. Under all circumstances the
maximum servo period is limited to 100ms to protect the pass
element.
Ordering Information
Active State of
Power Good Signa
l
HIGH
LOW
Package Options
8 Pin SO
HV301LG
HV311LG
Pinout
PWRGD (HV301)
PWRGD (HV311)
1
2
3
4
8
7
6
5
VDD
RAMP
GATE
SENSE
PWRGD Logic
Model
HV301
HV311
Condition
INACTIVE (Not Ready)
ACTIVE (Ready)
INACTIVE (Not Ready)
ACTIVE (Ready)
PWRGD
0
1
1
0
V
EE
HI Z
HI Z
V
EE
OV
UV
V
EE
Absolute Maximum Ratings
V
EE
reference to V
DD
pin
V
PWRGD
referenced to V
EE
Voltage
V
UV
and V
OV
referenced to V
EE
Voltage
Operating Ambient Temperature
Operating Junction Temperature
Storage Temperature Range
+0.3V to -100V
-0.3V to +100V
-0.3V to +12V
-40°C to +85°C
-40°C to +125°C
-65°C to +150°C
Pin Description
PWRGD –
The Power Good Output Pin is held inactive on initial
power application and will go active when the external MOSFET
is fully turned on. This pin may be used as an enable control
when connected directly to a PWM power module.
OV –
This OverVoltage (OV) sense pin, when raised above its
high threshold will immediately cause the GATE pin to be pulled
low. The GATE pin will remain low until the voltage on this pin falls
below the low threshold limit, initiating a new start-up cycle.
UV
– This UnderVoltage (UV) sense pin, when below its low
threshold limit will immediately cause the GATE pin to be pulled
low. The GATE pin will remain low until the voltage on this pin
rises above the high threshold limit, initiating a new start-up
cycle.
V
EE
– This pin is the negative terminal of the power supply input
to the circuit.
V
DD
This pin is the positive terminal of the power supply input
to the circuit.
RAMP –
This pin provides a current output so that a timing ramp
voltage is generated when a capacitor is connected.
GATE –
This is the Gate Driver Output for the external N-
Channel MOSFET.
Waveforms
Drain
50V/div
V
IN
50V/div
Gate
5.00V/div
SENSE –
The current sense resistor connected from this pin to
V
EE
Pin programs the circuit breaker trip limit.
I
inrush
500mA/div
5.00ms/div
3