HV300/HV310
Timing Diagrams
contact
bounce
GND
I
LIM
=
V
SENSE
R
SENSE
C
RAMP
I
RAMP
V
IN
V
OUT
-48V
V
OUT
t
START
=
1.2
V
t
TH
=
V
GS
(
th
)
V
UVL
V
IN
V
GATE
t
START
V
RAMP
C
RAMP
I
RAMP
V
RAMP
V
GATE
V
EE
t
TH
t
POR
=
t
START
+
t
TH
V
GS(lim)
V
GS(th)
V
GATE
t
RISE
≈
C
RAMP
I
R
g
fs
RAMP
−
SENSE
R
FB
0.9
I
LIM
C
LOAD
1
−
t
RISE
I
LIM
2
I
IN
t
POR
90%
I
LIM
t
LIM
≈
V
IN
t
PWRGD
t
RISE
t
LIM
active
t
PWRGD
=
V
INT
−
V
GS
(lim)
−
1.2
V
(
)
C
RAMP
I
RAMP
PWRGD
inactive
V
INT
is the internally regulated supply voltage and can
range from 9V to 11V.
Initialization
Limiting
Full On
V
GS(th)
is the gate threshold voltage of the external pass
transistor and may be obtained from its datasheet.
V
GS(lim)
is the pass transistor gate-source voltage required
to obtain the limit curent. It is dependent on the pass
transistor’s characteristics and may be obtained from the
transfer characteristics curves on the transistor datasheet.
g
fs
is the transconductance of the pass transistor and may
be obtained from its datasheet.
R
FB
is the internal feedback resistor and is 5kΩ nominal.
Absolute Maximum Ratings
V
EE
reference to V
DD
pin
V
PWRGD
referenced to V
EE
Voltage
Operating Ambient Temperature Range
Operating Junction Temperature
Range
Storage Temperature Range
UV & OV ref to V
EE
+0.3V to -100V
-0.3V to +100V
-40°C to +85°C
-40°C to +125°C
-65°C to +150°C
-0.3V to +12V
3
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