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SMS8198S 参数 Datasheet PDF下载

SMS8198S图片预览
型号: SMS8198S
PDF下载: 下载PDF文件 查看货源
内容描述: 飞利浦TriMedia⑩处理器伴侣监控器的16K位2线串行存储器 [Philips TriMedia⑩ Processor Companion Supervisor With a 16K-bit 2-wire Serial Memory]
分类和应用: 存储监控
文件页数/大小: 14 页 / 79 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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SMS8198
WRITE OPERATIONS
The SMS8198 allows two types of write operations: byte
write and page write. The byte write operation writes a
single byte during the nonvolatile write period (t
WR
). The
page write operation allows up to 16 bytes in the same
page to be written during t
WR
.
Byte WRITE
After the slave address is sent (to identify the slave
device, specify high order word address and a read or
write operation), a second byte is transmitted which
contains the low 8 bit addresses of any one of the 2,048
words in the array.
Upon receipt of the word address, the SMS8198 re-
sponds with an ACKnowledge. After receiving the next
byte of data, it again responds with an ACKnowledge. The
master then terminates the transfer by generating a
STOP condition, at which time the SMS8198 begins the
internal write cycle.
While the internal write cycle is in progress, the SMS8198
inputs are disabled, and the device will not respond to any
requests from the master. Refer to Figure 6 for the
address, ACKnowledge and data transfer sequence.
Page WRITE
The SMS8198 is capable of a 16-byte page write opera-
tion. It is initiated in the same manner as the byte-write
operation, but instead of terminating the write cycle after
the first data word, the master can transmit up to 15 more
words of data. After the receipt of each word, the
SMS8198 will respond with an ACKnowledge.
The SMS8198 automatically increments the address for
subsequent data words. After the receipt of each word,
the four low order address bits are internally incremented
by one. The high order five bits of the address byte remain
constant. Should the master transmit more than sixteen
words, prior to generating the STOP condition, the ad-
dress counter will “roll over,” and the previously written
data will be overwritten. As with the byte-write operation,
all inputs are disabled during the internal write cycle.
Refer to Figure 6 for the address, ACKnowledge and data
transfer sequence.
Acknowledges Transmitted from
SMS8198 to Master Receiver
If single byte-write only,
Stop bit issued here.
Acknowledges Transmitted from
SMS8198 to Master Receiver
SDA
Bus
Activity
1010
A A A R
10 9 8 W
A
C
Word Address
K
A A A A A A A A
7 6 5 4 3 2 1 0
A
C
K
Data Byte n
A
C
K
A
Data Byte n+1
C
K
D D D D D D D D
7 6 5 4 3 2 1 0
Data Byte n+15
C
K
D D D D D D D D
7 6 5 4 3 2 1 0
A
0
D D D D D D D D
7 6 5 4 3 2 1 0
S
T Device
A10,A9,A8
Type
A
R Address
Read/Write
T
0= Write
S
T
O
P
Slave Address
Master Sends Read
Request to Slave
Master Writes Word
Address to Slave
Master Writes
Data to Slave
Master Writes
Data to Slave
Master Writes
Data to Slave
Master Transmitter
to
Slave Receiver
Master Transmitter
to
Slave Receiver
Master Transmitter
to
Slave Receiver
Master Transmitter
to
Slave Receiver
Master Transmitter
to
Slave Receiver
Slave Transmitter
to
Master Receiver
2036 ILL8.0
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Slave Transmitter
to
Master Receiver
Shading Denotes
SMS8198
SDA Output Active
Figure 6. Page/Byte WRITE Mode
2036 5.0 4/18/00
7