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SMS8198S 参数 Datasheet PDF下载

SMS8198S图片预览
型号: SMS8198S
PDF下载: 下载PDF文件 查看货源
内容描述: 飞利浦TriMedia⑩处理器伴侣监控器的16K位2线串行存储器 [Philips TriMedia⑩ Processor Companion Supervisor With a 16K-bit 2-wire Serial Memory]
分类和应用: 存储监控
文件页数/大小: 14 页 / 79 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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SMS8198  
PIN CONFIGURATIONS  
TRI_RESET# - is an active low open drain output. It is  
driven low whenever VCC is below VTRIP. TRI_RESET# is  
also an input and can be used to debounce a switch input  
or perform signal conditioning. The TRI_RESET# pin  
does have an internal pull-up and should be left uncon-  
nected if the signal is not used in the system. However,  
when the pin is tied to a system TRI_RESET# line an  
external pull-up resistor should be employed.  
8-Pin SOIC  
1
2
3
4
8
7
6
5
V
CC  
WP  
SCL  
SDA  
NC  
TRI_RESET#  
NC  
Write Protect (WP) - All write operations can be disabled  
by maintaining WP > VIH.  
GND  
NoConnects(NC)-Thenoconnectinputsareunusedby  
the SMS8198; however, to insure proper operation they  
can be unconnected or tied to ground. They must not be  
2036 T PCon 2.0  
tied to VCC  
.
ENDURANCE AND DATA RETENTION  
The SMS8198 is designed for applications requiring up to  
100,000 erase/write cycles and unlimited read cycles. It  
provides 100 years of secure data retention, with or  
without power applied, after the execution of 100,000  
PIN NAMES  
SDA Serial Data I/O  
erase/write cycles.  
SCL  
TRI_RESET#  
GND  
Serial Clock Input  
Reset Output  
Ground  
RESET CONTROLLER DESCRIPTION  
VCC  
WP  
NC  
Supply Voltage  
Write Protect  
No Connect  
The device provides a precise reset output to a  
microcontroller and its associated circuitry ensuring cor-  
rect system operation during power-up/down conditions  
and brownout situations. The output is open drain, allow-  
ing control of the reset function by multiple devices.  
Duringpower-uptheresetoutputremainsinafixedactive  
state until VCC passes through the reset threshold and  
remains above the threshold for tPURST. The reset output  
isvalidwheneverVCC isequaltoorgreaterthan1V. IfVCC  
falls below the threshold for more than tGLITCH the device  
will immediately generate a reset and drive the output.  
PIN DESCRIPTIONS  
Serial Clock (SCL) - The SCL input is used to clock data  
into and out of the device. In the WRITE mode, data must  
remainstablewhileSCLisHIGH.IntheREADmode,data  
is clocked out on the falling edge of SCL.  
The reset pin is an I/O; therefore, forcing the pin to the  
active state can also manually reset the device. Because  
the I/O needs to be an open drain, the internal timer can  
only be triggered by the leading edge of the input. The  
resultingresetoutputwilleitherbetPURST,ortheexternally  
appliedresetsignal,whicheverislonger.Thiscanprovide  
an affective debounce or reset signal extender solution.  
Serial Data (SDA) - The SDA pin is a bidirectional pin  
used to transfer data into and out of the device. Data may  
changeonlywhenSCLisLOW,exceptSTARTandSTOP  
conditions. It is an open-drain output and may be wire-  
ORed with any number of open-drain or open-collector  
outputs.  
2036 5.0 4/18/00  
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