SMM150
Preliminary Information
I2C 2-WIRE SERIAL INTERFACE AC OPERATING CHARACTERISTICS – 100kHz
Over recommended operating conditions, unless otherwise noted. All voltages are relative to GND. See Figure 3 Timing Diagram.
Symbol Description
Conditions
Min Typ
Max Units
fSCL
SCL Clock Frequency
0
100
KHz
tLOW
tHIGH
tBUF
tSU:STA
tHD:STA
tSU:STO
tAA
Clock Low Period
Clock High Period
Bus Free Time
Start Condition Setup Time
Start Condition Hold Time
Stop Condition Setup Time
Clock Edge to Data Valid
4.7
4.0
4.7
4.7
4.0
4.7
0.2
µs
µs
µs
µs
µs
µs
µs
Before New Transmission - Note 1/
SCL low to valid SDA (cycle n)
3.5
SCL low (cycle n+1) to SDA
change
tDH
Data Output Hold Time
0.2
µs
Note 1/
tR
tF
tSU:DAT
tHD:DAT
TI
SCL and SDA Rise Time
SCL and SDA Fall Time
Data In Setup Time
Data In Hold Time
Noise Filter SCL and SDA
Write Cycle Time
1000
300
ns
ns
ns
ns
ns
ms
Note 1/
250
0
Noise suppression
100
tWR
5
Note: 1/ - Guaranteed by Design.
TIMING DIAGRAMS
tWR (For W rite Operation Only)
tHIGH
tLOW
tR
tF
SCL
tBUF
tHD:DAT
tSU:DAT
tSU:SDA
tSU:STO
tHD:SDA
SDA
(IN)
tAA
tDH
SDA
(OUT)
Figure 3. Basic I2C Serial Interface Timing
Summit Microelectronics, Inc
2075 2.6 05/13/05
7
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
