SMH4811A
Preliminary
FUNCTIONAL DESCRIPTION
GENERAL OPERATION
System Enables
There are several enabling inputs, which allow a host
system to control the SMH4811A. The Pin Detect pins
(PD1# & PD2#) are two active low enables that are
generally used to indicate that the add-in circuit card is
properly seated. This is typically done by clamping the
inputs to VSS through the implementation of an injector
switch,oralternativelythroughtheuseofastaggeredpins
at the card-cage interface. Two shorter pins arrayed at
opposite ends of the connector force the card to be fully
seated (not canted) before both pin detects are enabled.
Care must be taken not to exceed the maximum voltage
rating of these pins during the insertion process. Refer to
details in the Applications Section for proper circuit imple-
mentation.
The SMH4811A is an integrated power controller for hot
swappableadd-incards. Thedeviceoperatesfromawide
supplyrangeandgeneratesthesignalsnecessarytodrive
an isolated output DC/DC converter. As a typical add-in
board is inserted into the powered backplane physical
connections must first be made with the chassis to dis-
charge any electrostatic voltage potentials. The board
then contacts the long pins on the backplane that provide
powerandground. Assoonaspowerisappliedthedevice
starts up, but does not immediately apply power to the
output load. Under-voltage and over-voltage circuits
inside the controller check to see that the input voltage is
within a user-specified range, and pin detection signals
determine whether the card is seated properly.
TheEN/TSinputprovidesanactivehighcomparatorinput
that may be used as a master enable or temperature
sense input. These inputs must be held low for a period of
These requirements must be met for a Pin Detect Delay
period of tPDD, after which time the hot-swap controller
enables VGATE to turn on the external power MOSFET
tPDD before a power-up sequence may be initiated.
switch. The VGATE output is current limited to IVGATE
,
allowing the slew rate to be easily modified using external
passivecomponents. Duringthecontrolledturn-onperiod
the VDS of the MOSFET is monitored by the DRAIN
SENSE input. When the drain sense drops below 2.5V,
andVGATEgetsaboveVDD –VGT,thepowergoodoutput
can turn on the DC/DC controller. A Power Good Enable
inputmaybeusedtoactivateordeactivateanoutputload.
Under-/Over-Voltage Sensing
The Under-Voltage (UV) and Over-Voltage (OV) inputs
provideasetofcomparatorsthatactinconjunctionwithan
external resistive divider ladder to sense when the host
supplyvoltageexceedstheuserdefinedlimits. Iftheinput
to the UV pin rises above 2.5V, or the input to the OV pin
falls below 2.5V for a period of tPDD, the power-up se-
quence may be initiated. The tPDD filter helps prevent
spurious start-up sequences while the card is being in-
serted. If UV falls below 2.5V or OV rises above 2.5V, the
PG and VGATE outputs will be shut down immediately.
Steady state operation is maintained as long as all condi-
tions are normal. Any of the following events may cause
the device to disable the DC/DC controller by shutting
down the power MOSFET: an under-voltage or over-
voltage condition on the host power supply; an over-
currenteventdetectedontheCBSENSEinput;afailureof
the power MOSFET sensed via the DRAIN SENSE pin;
the pin detect signals becoming invalid; or the master
enable (EN/TS) falling below 2.5V. The SMH4811A may
be configured so that after any of these events occur the
VGATEoutputshutsoffandeitherlatchesintoanoffstate
or recycles power after a cooling down period, tCYC
.
2.5V
Powering VDD
OV / UV
The SMH4811A contains a shunt regulator on the VDD pin
that prevents the voltage from exceeding 12V. It is
necessarytouseadropperresistor(RD)betweenthehost
power supply and the VDD pin in order to limit current into
the device and prevent possible damage. The dropper
resistor allows the device to operate across a wide range
of system supply voltages, and also helps protect the
deviceagainstcommon-modepowersurges. Refertothe
Applications Section for help on calculating the RD resis-
tance value.
t
UOFLTR
FAULT#
2044 Fig01 5.0
Figure 1. Under-/Over-Voltage Filter Timing
SUMMIT MICROELECTRONICS, Inc.
2044 6.1 2/8/01
6
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
