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SMH4814NCR05 参数 Datasheet PDF下载

SMH4814NCR05图片预览
型号: SMH4814NCR05
PDF下载: 下载PDF文件 查看货源
内容描述: 双路馈电有源或门可编程热插拔控制器 [Dual Feed Active-ORing Programmable Hot Swap Controller]
分类和应用: 控制器
文件页数/大小: 44 页 / 926 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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SMH4814  
Preliminary Information  
CONFIGURATION REGISTERS (CONTINUED)  
Register R0D – Power Down or Forced Shutdown, Fault or no Fault  
These bits control how the given inputs affect the power off.  
Register R0D  
D7  
0
1
-
D6  
D5  
D4  
-
D3  
-
D2  
-
D1  
-
D0  
-
Action  
-
-
FB low w/ FET on: Power Down  
-
-
-
-
-
-
-
FB low w/ FET on: Forced Shutdown  
ENTS low w/ FET on: Power Down  
ENTS low w/ FET on: Forced Shutdown  
OV condition: Power Down  
OV condition: Forced Shutdown  
UV condition: Power Down  
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
UV condition: Forced Shutdown  
FB low w/ FET on: don’t set FAULT  
FB low w/ FET on: set FAULT  
ENTS low w/ FET on: don’t set FAULT  
ENTS low w/ FET on: set FAULT  
OV condition: don’t set FAULT  
OV condition: set FAULT  
-
-
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
1
UV condition: don’t set FAULT  
UV condition: set FAULT  
-
-
-
-
-
-
-
Register R0E – Slew Rate Control  
Bits D[7:6] control the PUPD Time Slot. Bits D[5:4] control the PUPC Time Slot. Bits D[3:2] control the PUPB Time  
Slot. Bits D[1:0] control the PUPA Time Slot.  
Register R0E  
D7  
0
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Action  
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Scale Factor SLEW_CNTL to Curr. Reg. = 1/100  
Scale Factor SLEW_CNTL to Curr. Reg. = 1/50  
Scale Factor SLEW_CNTL to Curr. Reg. = 1/20  
Scale Factor SLEW_CNTL to Curr. Reg. = 1/10  
Use SLEW_CNTL for Current Regulation Voltage =  
Curr. Reg. Voltage is fixed by registers R09 and R0A  
Use SLEW_CNTL for Current Regulation Voltage =  
Curr. Reg. Voltage = SLEW CNTL*scale factor D[7:6]  
0
1
1
1
0
1
-
-
-
-
-
-
-
-
0
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0
Use SLEW_CNTL for FET GATE Current Ramp =  
FET GATE current is fixed at Max Current  
Use SLEW_CNTL for FET GATE Current Ramp =  
FET GATE current = (Max Current)*(SLEW CNTL)/2.5  
-
1
-
Max FET GATE Current = (8+(n X 8))µA  
Largest FET GATE Current = (8+(15 X 8)) = 136µA  
-
-
-
1
1
1
1
0
0
0
1
0
1
-
-
-
-
-
-
-
-
0
1
Lowest FET GATE Current = (8+(0 X 8)) = 8µA  
FET GATE Current = (8+(11 X 8)) = 96µA  
Summit Microelectronics, Inc  
2080 2.0 07/21/05  
37  
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