SMH4814
Preliminary Information
INTERNAL FUNCTIONAL BLOCK DIAGRAM
PUPA
Voltage
Regulator
and
V12
Polarity
PUPA
Reference
Generator
5V_CAP
FBA
CBSENSE
PUPB
CB Sense
and Gate
Control
Polarity
PUPB
DRAIN_SENSE
SLEW
VGATE_HS
FBB
Time
Slot and
PUP
PUPC
Polarity
PUPC
Control
E2 Memory
Configuration, Status,
and Command Registers
FBC
SCL
SDA
PUPD
I2C Interface
Polarity
Virtual Address A2, A1
PUPD
Programmable Fault
Conditions
FBD
FEEDA
FEEDB
Supply
Arbitration
GATEA
ENTS
+
2.5V Ref
-
GATEB
PD0
PD1
PO
Filter
UV
+
Prog Ref
-
Glitch
Filter
Prog Hyst
UV/OV
Filter
OV
+
-
Prog Ref
Prog Hyst
FAULT#
Fault
Latch
Glitch
Filter
Duty Cycle
Timer
RESET#
Figure 2. Block Diagram
Summit Microelectronics, Inc
2080 2.0 07/21/05
3
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
